Dual Clocking Mode System for SOC Power Optimization
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Solution Overview
Problem
System on a chip (SOC) devices face high power consumption due to the use of highly accurate clock circuits even in low power operating modes, which is inefficient as these modes do not require such precision.
Innovation Solution
Implementing a dual clocking mode system where a less accurate clock signal is used in low power modes to reduce power consumption, with a more accurate clock signal reserved for performance modes, and integrating this with a DC-DC converter to manage power supply voltages accordingly.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a highly accurate clock circuit is used in all operating modes, then clock accuracy is improved, but power consumption increases
Solution Approach 1:
The system dynamically switches between two clock circuits based on operating mode: a first clock circuit for low-power modes and a second clock circuit for performance modes. This dynamic adaptation allows the system to optimize the trade-off between clock accuracy and power consumption according to actual operational requirements.
Solution Approach 2:
Different clock circuits are assigned to different operating conditions: the first clock circuit (lower accuracy, lower power) is used when high precision is not required, while the second clock circuit (higher accuracy, higher power) is used when precision is critical. This local optimization applies the appropriate level of quality only where needed.
2Use of energy by moving object
If a less accurate clock signal is used in low power modes, then power consumption is reduced, but clock accuracy deteriorates
Solution Approach 1:
The system dynamically selects the appropriate clock circuit based on the current operating mode. In low-power modes, the first clock circuit is activated providing sufficient accuracy at reduced power consumption. When performance modes are entered, the system switches to the second clock circuit for higher accuracy, thus dynamically adapting to changing requirements.
Solution Approach 2:
The system changes the operational parameters by switching between different clock circuits with different accuracy and power consumption characteristics. This parameter change allows the system to optimize performance for each specific operating condition rather than being constrained by a single fixed configuration.
Data Source
AI summary
A system on a chip includes a processing module, ROM, RAM, and a clocking circuit. The clock circuit is coupled to produce a first clock signal when the SOC is in a low power mode and to produce a second clock signal when the SOC is in a performance mode, where the first clock signal is less accurate than the second clock signal. The clock circuit consumes more power when producing the second clock signal than when producing the first clock signal.