SOC Addressing Using Port Identifiers and Address Mapping

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Solution Overview

Problem

Current system on a chip (SOC) communication methods rely solely on memory-mapped addressing, which does not allow master components to selectively choose the port for transaction routing, limiting flexibility in intra- and inter-chip communications.

Innovation Solution

Implementing a master module, a swapping module, and a switch module that generate and modify transaction requests with both memory addresses and interface select bits to selectively route transactions to desired ports within the SOC, enabling both memory-mapped and port-identified addressing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If memory-mapped addressing is used for intra-chip communication, then slave components can be addressed using standard memory addresses, but master components cannot selectively choose the port for transaction routing

Engineering Contradiction:
Improveport selection capabilityVSAvoidaddressing mechanism
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The address field is segmented into two parts: upper bits that are swapped with interface select bits for port identification, and lower bits that remain as memory-mapped addresses. This segmentation allows the system to simultaneously support both port-specific routing and memory-mapped addressing without increasing overall complexity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A swapping module acts as an intermediary between the master component and the switch fabric. This module automatically performs the bit-swapping operation between interface select bits and address bits, transparently enabling port selection without requiring changes to the switch fabric or existing memory-mapped addressing infrastructure

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If memory-mapped addressing is used for inter-chip communication, then slave components with the same address space can coexist, but port selection for selective routing is not possible

Engineering Contradiction:
Improvecommunication flexibilityVSAvoidport identification
Core Design Contradiction:
Adaptability or versatilityVSEase of operation

Solution Approach 1:

The system adds a new dimension to the addressing scheme by introducing interface select bits that operate in a different dimension from traditional memory addresses. The swapping module transfers information between these dimensions, allowing port identification without disrupting the existing memory-mapped addressing space that enables multiple slave components with identical addresses to coexist

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Ease of manufacture

If port selection is implemented without modifying the switch fabric, then existing switching infrastructure is preserved, but traditional addressing mechanisms must be enhanced

Engineering Contradiction:
Improveswitch fabric compatibilityVSAvoidtransaction request structure
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The interface select bits are prepared in advance within the transaction request structure, positioned in specific bit locations that the swapping module can easily identify and exchange with address bits. This preliminary preparation of the transaction request structure enables port selection functionality to be added without modifying the switch fabric itself

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The transaction request structure is enhanced by adding interface select bits as new parameters. These parameters work in conjunction with existing address parameters, allowing the system to encode both memory-mapped addressing information and port identification information within the same transaction request without changing the fundamental switch fabric operation

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8949474B1Method for inter-chip and intra-chip addressing using port identifiers and address mapping
Publication Date: 2015.02.03 MARVELL ASIA PTE LTD
  • US8949474B1 patent drawing
  • US8949474B1 patent drawing
  • US8949474B1 patent drawing

AI summary

A system on a chip (SOC) includes a master module, a first swapping module, and a switch module. The master module is configured to generate a transaction request, the transaction request including an address field including an address, the address corresponding to a first slave module associated with the transaction request, and a plurality of interface select bits corresponding to a desired one of a plurality of ports of the first slave module. The first swapping module is configured to swap, in the transaction request, the plurality of interface select bits with selected bits of the address in the address field. The switch module is configured to route the transaction request to the desired one of the plurality of ports based on the address.