SoC Trace Data Management via DMA Controllers
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Solution Overview
Problem
Existing systems for capturing and processing high bandwidth sensor data in Advanced Driver Assistance Systems (ADAS) face challenges in tracing data without impacting system performance, as current methods often require significant resources and interfere with ongoing algorithms.
Innovation Solution
A system-on-chip (SoC) architecture that includes processing resources, on-chip memory, and interfaces, allowing for unobtrusive capture and transmission of trace data using DMA controllers and event buses, enabling trace data to be stored on-chip alongside sensor data without affecting system performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of information
If trace data is captured using existing methods, then trace information can be obtained, but system performance is impacted and CPU load increases
Solution Approach 1:
The patent extracts trace data capture functionality from the main processing path by using dedicated DMA controllers that independently capture trace data from sensors and processing resources. This separation allows trace information to be obtained without burdening the CPU or impacting the performance of live data processing algorithms.
Solution Approach 2:
The patent introduces DMA controllers as intermediary components between sensors/processing resources and memory/interfaces. These DMA controllers handle the trace data transmission independently, acting as mediators that eliminate the need for CPU intervention in trace capture operations, thereby preserving system performance.
2Productivity
If trace data is transmitted through the same interface as live data, then interface utilization is maximized, but data interference and performance degradation occur
Solution Approach 1:
The patent segments the data transmission paths by providing separate interfaces: one interface dedicated to live sensor data transmission and another interface dedicated to trace data transmission. This segmentation prevents data interference between live operations and trace capture, ensuring both data integrity and reliable trace information retrieval.
3Quantity of substance
If on-chip memory is used for trace data storage, then trace capacity is increased, but memory bandwidth for live data processing is reduced
Solution Approach 1:
The patent segments the memory architecture by providing separate memory spaces: on-chip memory dedicated to trace data storage and separate memory resources for live data processing. This segmentation allows the system to increase trace data storage capacity using on-chip memory without reducing the bandwidth available for live sensor data processing, as the two memory paths operate independently.
Data Source
AI summary
Systems and methods in which trace data is efficiently managed are provided. An example system includes a memory, a first interface, and a processing resource communicably coupled to the first interface and to the memory. The processing resource includes a buffer, and a first controller to transmit a set of data from the buffer with associated trace information for the set of data to the memory. A second controller transmits the set of data with the associated trace information from the memory to a second interface.