Program Initiation/Switching TRIZ Cases
- Application State Suspension and Resume Mechanism
A resource management unit preserves application execution state in nonvolatile storage for seamless resumption.
- Database Maintenance Using Virtual Buckets for Parallel Processing
Virtual buckets segment database objects to enable parallel maintenance execution across multiple processing channels.
- Scheduling Scheme Configuration via Operation Dimension Verification
A scheduling scheme configuration method verifies operation dimensions to remove abnormal parameters and generate valid schedules.
- Egress Port Loopback for Fast Packet Rerouting
Egress port loopback mechanism reroutes packets via internal paths, eliminating switching delays and preserving service quality during network failures.
- Live Database Schema Evolution Without Outage
Dynamic thread routing adjusts package lock release behavior during schema changes to prevent system outages and ensure data integrity.
- Mini App Switching via In-Context Display and Selection
A mini app switching method displays target app information within the current interface for direct selection.
- User Space Hypervisor Privileged Instruction Handling
A user space hypervisor executes privileged instructions via memory monitoring to bypass kernel intervention.
- AI Agent Task Planning via Scene Graph and Instruction Segmentation
Segmenting instructions via a scene graph enables collaborative task planning among multiple AI agents without increasing device complexity.
- App Migration System Automating Permission Settings
An app migration system automatically sets access permissions based on destination location during movement between public and private spaces.
- Completion Queue Reduces Call Stack Usage for Future Objects
A completion queue manages future object completions in heap memory, preventing stack overflow errors and improving system performance.
- MapReduce Job Scheduling via Effective Processing Time
A MapReduce scheduler calculates effective processing time per node to allocate resources dynamically.
- Stream Processing Pipeline Stage Deployment via Directed Graph Analysis
Directed graph analysis calculates node degrees to deploy stream processes at optimal stages, reducing network load and enhancing fault tolerance.
- Hypervisor Kernel Exploit Detection via SMEP Enforcement
A hypervisor enforces execution protection on kernel memory to detect exploitation attempts.
- Cross-Architecture TEE Migration via Policy Enforcement Agent
A migration agent unifies trusted execution environment transfers across diverse hardware backends.
- Application State Management for Resource-Constrained Devices
A determination unit calculates shift time lengths to control application states and conserve computational resources.
- Reduce Task Scheduler Optimizing Shuffle Cost
A reduce task scheduler assigns tasks to nodes based on intermediate data counters.
- Situation-Aware Virtual Machine Migration for Cluster Upgrades
A situation-aware virtual machine migration system manages memory states during node upgrades to reduce data transfer.
- Batch Job Fragmentation for Transient Compute Instances
Dividing batch jobs into fragments enables reliable execution on transient compute instances with automatic retry mechanisms.
- SMM Runtime Resiliency Manager for Secure Policy Updates
A System Management Mode Runtime Resiliency Manager enforces resource protection policies to secure computing components.
- Shared Non-Volatile Memory for Machine Learning Data Structures
A shared non-volatile memory space enables concurrent access to machine-learning data structures by general-purpose and graphics processing resources.
- Dynamic Data Reconstruction Rate Adjustment in Distributed Storage
Integrity processing unit adjusts encoded data slice rebuilding speed using Cauchy Reed-Solomon decoding functions.
- Asynchronous Task Queue Configuration in Database Systems
Task queue manager coordinates asynchronous task execution across distributed database nodes using combined in-memory and persistent storage states.
- Dynamic Data Processing Offload via Wireless Intermediary
Wireless intermediary routing balances battery life against processing capacity by dynamically offloading compute-intensive tasks to servers.
- Nested Application Display with Pressure Input
Nested windows and pressure detection resolve the contradiction between viewing blocked programs and maintaining top-layer clarity.
- Neural Network Superlayer Partitioning for Memory Efficiency
Segment neural network layers into superlayers to reduce external communications and energy usage by optimizing memory working sets.
- Big Core Activation via Instruction Splitting and Parallel Execution
A software interface splits large instructions into sub-instructions for parallel execution across multiple processing units.
- Information Processing Apparatus Program Activation Control
An information processing apparatus restricts program activations using visual indicators to manage system resources.
- Dynamic Thread Management for High-Priority Task Execution
Segmenting task queues allows a controller to bypass idle threads and execute urgent subtasks immediately, resolving delays in high-priority processing.
- Two-Stage Clustering for Power Consumption Prediction Accuracy
A two-stage clustering method refines training data quality for power consumption prediction models.
- Multi-Level Time Decay Storage Queue for I/O Prioritization
Segmented queues with dynamic shifting reduce CPU overhead while maintaining consistent response times for varying service level objectives.
- Automated Assistant Action Resumption via Local Data Storage
An automated assistant stores partial dialog data locally to resume interrupted actions without user re-entry.
- Dynamic Iteration Ports in Heterogeneous Dataflow Engines
An iterative dataflow engine uses dynamic iteration ports to manage control flow across heterogeneous processors and accelerators.
- Virtualization Latency Management via Guest Process Descheduling
A virtualization component manages latency by injecting code to deschedule guest processes.
- Two-Level Stack Scheme for RTOS Memory Optimization
A two-level stack scheme manages task execution in real-time operating systems by dynamically moving stack pointers between dedicated and shared memory pools.
- Process Scheduling via Memory Bandwidth Quotas
Memory bandwidth quotas constrain process execution to prevent I/O bottlenecks, avoiding costly hardware overprovisioning.
- Multi-threaded Flow Control via CPU Core and Thread State
A flow control system manages thread entry to critical sections by evaluating CPU core identifiers, thread states, and processing rates.
- Container Workload Placement Balancing CPU Memory Resources
Orchestrator service migrates existing workloads to free sufficient CPU and memory capacity before allocating additional resources.
- Semiconductor Thread Comparison Circuit for Failure Detection
A semiconductor integrated circuit compares execution results between redundant threads to detect register failures.
- Integrated Business Data System for Predictive Decision-Making
An integrated business operating system automates data retrieval and analysis to resolve errors from manual transformation between separate software packages.
- Temperature-Aware Task Scheduling for SoC Thermal Management
A temperature-aware task scheduler calculates thermal metrics and gradients to distribute computational workloads across processing units.
- Multi-Bank Switch Scheduler for AI Interconnect Latency
A multi-bank memory scheduler allocates packet segments across independent banks to boost data exchange rates in high-performance computing switches.
- PLC Auxiliary Function Time Monitoring for Jitter-Free Execution
A time monitoring function constrains auxiliary software execution within predefined PLC task run-times to maintain deterministic control cycles.
- Contextual Application Profile Management for State Restoration
A computing system saves contextually related application sets as unified profiles to enable rapid re-launching with preserved states.
- Neural Network Node Annotation for Dynamic CPU GPU Task Allocation
Node annotations indicate preferred execution hardware for neural network operations.
- Timer Rate Limiting via Coalescing Windows for Power Reduction
Coalescing timer executions into dynamic windows reduces interrupt frequency, lowering power consumption while preserving high-priority timing accuracy.
- Hypervisor VCPU Power State Mapping in Virtualized Environments
A hypervisor exposes processor core power state levels to guest operating systems for dynamic virtual central processing unit association.
- SoC Trace Data Management via DMA Controllers
DMA controllers capture and transmit trace information alongside sensor data, resolving performance impacts from high bandwidth tracing.
- Dynamic Lock Swapping for Task Queue Processing Delays
A lock management system transfers resource locks between tasks to maintain processing throughput.