Semiconductor Thread Comparison Circuit for Failure Detection
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Solution Overview
Problem
Existing semiconductor integrated circuit devices face challenges in detecting failures, particularly in registers during instruction fetching and execution, and common cause failures, while maintaining performance and reliability, especially in critical systems like vehicles.
Innovation Solution
A semiconductor integrated circuit device that executes multiple threads synchronously with clocks, using separate register sets for each thread and a comparison circuit to detect failures by comparing results between threads, thereby improving failure detection without compromising performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If duplicated operations are always performed in two microcomputers, then safety is improved, but performance deteriorates
Solution Approach 1:
The system dynamically switches between performance mode and safety mode based on operational requirements. In performance mode, single microcomputer operation is used for high-speed processing. In safety mode, duplicated operations are performed for failure detection. This dynamic switching resolves the contradiction by allowing the system to optimize for either safety or performance depending on the operational context.
Solution Approach 2:
The system changes the operational parameter from single-threaded to multi-threaded execution when safety mode is activated. By modifying the execution mode parameter, the system can perform duplicated operations for safety verification without permanently sacrificing performance, thus resolving the contradiction between safety and performance.
2Reliability
If data is loaded in advance before mode switching, then performance improvement is limited, but safety mode switching is enabled
Solution Approach 1:
The system performs preliminary actions by loading necessary data into buffers before mode switching occurs. This allows the safety mode to be activated without significant performance penalty, as the data is already prepared. The preliminary loading resolves the contradiction by minimizing the performance impact of safety mode switching while still enabling the safety functionality.
3Ease of operation
If register values are transferred via queues between threads, then instruction execution flexibility is improved, but failure detection capability deteriorates
Solution Approach 1:
The system introduces a comparison circuit as an intermediary between the thread execution units and the output. This comparison circuit monitors the results from both threads and can detect failures by comparing outputs, even when register values are transferred via queues. The intermediary resolves the contradiction by adding failure detection capability without removing the queue-based flexibility.
Solution Approach 2:
The system implements feedback through the comparison circuit that continuously monitors thread execution results. When a failure is detected through comparison, the system can trigger error handling mechanisms. This feedback loop resolves the contradiction by maintaining both the queue-based execution flexibility and the ability to detect failures through result comparison.
Data Source
AI summary
The present invention provides a semiconductor integrated circuit device realizing improved detection of a failure while suppressing deterioration in performance. In a semiconductor integrated circuit device executing a plurality of threads while switching them synchronously with clocks, registers used for executing the threads are provided for the respective threads. Programs independent of each other and the same program as the threads are executed while being switched. In the case of executing the same program by a plurality of threads, a comparison circuit for comparing results of execution using registers provided in correspondence with the threads is provided.