Soft Bit Compression in Non-Volatile Memory ECC Reads
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current memory systems face inefficiencies in error correction due to the need for additional reads to generate soft bit data, which increases power consumption and performance losses, especially when relying on hard bit values that are unreliable near threshold voltage levels.
Innovation Solution
An efficient soft sense read mode is implemented, combining hard bit and soft bit sensing into a single operation with pre-charging and dual discharge sensing, and on-the-fly data compression to reduce data transfer and enhance performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If additional reads are performed to generate soft bit data, then error correction reliability is improved, but power consumption increases
Solution Approach 1:
The patent combines hard bit sensing and soft bit sensing into a single read operation. The sense amplifier performs dual discharge sensing where the first discharge determines hard bit values and the second discharge generates soft bit values, eliminating the need for separate additional reads and reducing power consumption while maintaining error correction reliability
Solution Approach 2:
The soft bit data generation is performed continuously during the same read operation that retrieves hard bit data. The sense amplifier transitions from hard bit sensing to soft bit sensing without interrupting the read operation, ensuring continuous useful action and avoiding additional power-consuming reads
2Reliability
If soft bit data is generated through additional reads, then data reliability is improved, but performance deteriorates
Solution Approach 1:
The patent merges soft bit data generation with the primary read operation by implementing dual discharge sensing in the sense amplifier. This allows soft bit values to be generated during the same time hard bit data is retrieved, eliminating performance degradation while maintaining improved data reliability for error correction
3Reliability
If soft bit data is generated without compression, then data accuracy is maintained, but data transfer overhead increases
Solution Approach 1:
The patent implements on-the-fly compression of soft bit data during the read operation. The compression circuit processes soft bit values immediately after generation, discarding redundant information while recovering the essential reliability data needed for error correction, thereby reducing data transfer overhead without sacrificing data accuracy
Data Source
AI summary
For a non-volatile memory that uses hard bit and a soft bit data in error correction operations, an on-the-fly compression scheme is used for the soft bit data. As soft bit data is transferred to a memory's input-output interface, the soft bit data is compressed prior to transmission to the an ECC engine memory controller, while hard bit data is transferred in un-compressed form.