Real-Equivalent-Time Oscilloscope Using Software Clock Recovery
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Solution Overview
Problem
Conventional high-end equivalent-time oscilloscopes are costly due to hardware triggers, while real-time oscilloscopes are expensive due to high acquisition rates and multiple analog-to-digital converters, leading to errors and high costs, which are prohibitive for production testing.
Innovation Solution
A real-equivalent-time oscilloscope using software clock recovery to reconstruct signals without hardware triggers, employing a single high-resolution analog-to-digital converter and adjustable sample rates to determine bit and baud rates, reducing costs and improving acquisition speed and accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional high-end equivalent-time oscilloscopes use hardware triggers to achieve signal acquisition, then measurement precision is improved, but device complexity and cost increase
Solution Approach 1:
The patent extracts the trigger function from hardware and implements it in software. The oscilloscope uses a single ADC without hardware triggers, and the trigger functionality is implemented through software algorithms that process the digitized signal to identify trigger events and reconstruct waveforms, thereby eliminating complex hardware trigger circuits while maintaining measurement precision
Solution Approach 2:
The patent replaces the mechanical/hardware trigger system with a software-based trigger system. Instead of using hardware triggers to synchronize signal acquisition, the system uses software processing to analyze the digitized signal, detect trigger conditions, and reconstruct the waveform, substituting physical trigger mechanisms with computational methods
2Speed
If conventional real-time oscilloscopes use multiple analog-to-digital converters to achieve high acquisition rate, then speed is improved, but device complexity and cost increase
Solution Approach 1:
The patent merges the functionality of multiple ADCs into a single ADC. By using one high-resolution ADC with software-based sampling rate adjustment and signal processing, the system achieves the equivalent functionality of multiple ADCs, reducing device complexity and cost while maintaining high acquisition rates through intelligent software control
Solution Approach 2:
The patent changes the sampling rate parameter dynamically through software control. A single ADC operates at different sampling rates as determined by software algorithms that analyze the input signal characteristics, allowing the system to achieve high acquisition rates comparable to multiple ADCs configured in parallel, but with reduced hardware complexity
3Speed
If conventional real-time oscilloscopes use multiple track-and-hold circuits and analog-to-digital converters, then acquisition rate is improved, but manufacturing precision deteriorates due to interleaving mismatch
Solution Approach 1:
The patent extracts the signal processing functionality from the hardware domain and moves it to the software domain. By using a single ADC with software-based processing, the system eliminates the interleaving architecture that causes mismatch errors, achieving high acquisition rates without the precision degradation associated with multiple track-and-hold circuits and ADCs
Solution Approach 2:
The patent uses software to create a virtual copy of the signal processing pipeline that would otherwise require multiple physical ADCs. Through software-based sampling and signal reconstruction, the system simulates the functionality of multiple precision ADCs while avoiding the interleaving mismatch errors that arise from combining multiple physical conversion paths
Data Source
AI summary
A test and measurement instrument, such as an oscilloscope, having a Nyquist frequency lower than an analog bandwidth, the test and measurement instrument having an input configured to receive a signal under test having a repeating pattern, a single analog-to-digital converter configured to receive the signal under test and sample the signal under test over a plurality of repeating patterns at a sample rate, and one or more processors configured to determine a frequency of the signal under test and reconstruct the signal under test based on the determined frequency of the signal, the pattern length of the signal under test, and/or the sample rate without a trigger.