SOI Device Base Boost Region for Substrate Voltage Immunity

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Solution Overview

Problem

Silicon on Insulator (SOI) semiconductor devices face challenges in achieving good current gain with reduced dependence on substrate voltage under the oxide layer, as existing designs often rely heavily on substrate voltage for current-gain properties.

Innovation Solution

Incorporating a base boost region with a higher dopant concentration than the base region, extending from the emitter to the insulator layer, which forms a pn junction and suppresses vertical current, thereby reducing dependence on substrate voltage and enhancing lateral current flow.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a base boost region with higher dopant concentration is added to suppress vertical current, then current gain becomes independent of substrate voltage, but device structure becomes more complex

Engineering Contradiction:
Improvecurrent gain stabilityVSAvoiddevice structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies local quality by creating a base boost region with higher dopant concentration specifically in the area where vertical current flows (from emitter through oxide to substrate). This localized doping enhancement suppresses vertical current and stabilizes current gain without requiring changes to the entire device structure. The selective application of higher doping concentration in the base region directly addresses the substrate voltage dependence problem while maintaining simplicity elsewhere in the device.

Inventive Principle:
Principle #3Local quality

2Adaptability or versatility

If substrate voltage is used to control current gain, then current gain can be adjusted, but device performance becomes dependent on substrate voltage variations

Engineering Contradiction:
Improvecurrent gain controlVSAvoidperformance stability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent applies preliminary anti-action by pre-establishing a base boost region with higher dopant concentration that creates a potential barrier against vertical current flow before substrate voltage variations can affect device performance. This preemptive structural modification counteracts the harmful effect of substrate voltage dependence, ensuring that current gain remains stable regardless of substrate voltage fluctuations. The base boost region acts as a protective feature that prevents the inversion of the desired relationship between substrate voltage and current gain stability.

Inventive Principle:
Principle #9Preliminary anti-action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively decouples current gain and other properties from substrate voltage, achieving higher current gain and improved performance by suppressing vertical current and increasing the threshold for inversion, making the current gain almost independent of substrate voltage.

Implementation Method 1

a base boost region of a first conductivity type in the active layer extending from the emitter region to the insulator layer, the base boost region forming with the emitter a pn junction

Methodology Applied
Scientific Effectpn junction: Diode

Implementation Method 2

the dopant concentration of the base boost region is higher than that of the base region

Methodology Applied
Scientific EffectDoping: Dopants

Data Source

PatentUS8022506B2SOI device with more immunity from substrate voltage
Publication Date: 2011.09.20 NXP BV
  • US8022506B2 patent drawing
  • US8022506B2 patent drawing
  • US8022506B2 patent drawing

AI summary

A semiconductor on insulator device has an insulator layer, an active layer (40) on the insulator layer, a lateral arrangement of collector (10), emitter (30) and base (20) on the active layer, and a high Base-dose region (70) extending under the emitter towards the insulator to suppress vertical current flowing under the emitter. This region (70) reduces the dependence of current-gain and other properties on the substrate (Handle-wafer) voltage. This region can be formed of the same doping type as the base, but having a stronger doping. It can be formed by masked alignment in the same step as an n type layer used as the body for a P-type DMOS transistor.