SOI Carrier Substrate Zoning for COP Detection and RF Resistivity
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Solution Overview
Problem
Fully depleted silicon-on-insulator (FD-SOI) structures face challenges in achieving uniformity and high crystal quality in thin silicon layers, compatibility with low inspection thresholds, and stable resistivity for radiofrequency applications, due to issues with high interstitial oxygen content and sensitivity to high-temperature treatments.
Innovation Solution
A carrier substrate with a surface region of low crystal-originated particles, an upper region of low interstitial oxygen content and high resistivity, and a lower region of high micro-defect concentration, produced through specific heat treatments, enabling compatibility with stringent specifications for logic and radiofrequency applications.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high-Oi carrier substrates are used to achieve robustness against slip-line defects, then resistance to slip-line failure is improved, but crystal-originated particles (COPs) are generated that limit inspectability of the working layer
Solution Approach 1:
The patent applies local quality by creating distinct regions within the carrier substrate with different oxygen concentrations. The method produces a surface region with high oxygen concentration (≥1×10^18 atoms/cm³) to prevent slip-line defects, while maintaining a deep region with low oxygen concentration (<1×10^18 atoms/cm³) to eliminate COPs and ensure inspectability. This spatial differentiation of material properties resolves the contradiction between reliability and inspectability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides a carrier substrate that is resistant to slip-line defects, allows for precise inspection of defects smaller than 50 nm, and maintains stable resistivity during high-temperature treatments, enhancing the quality and reliability of FD-SOI structures for advanced electronic components.
Implementation Method 1
it has to be able to undergo treatments at high temperatures for long durations, in particular, during production thereof; the treatments are required to smooth the free surface of the working layer and remedy crystal defects present in this layer
Implementation Method 2
COP defects located in a surface zone of the carrier substrate, even if they remain below the buried oxide layer of the SOI structure, are detected during the inspection of the working layer at very thorough detection thresholds, due to the penetration of the inspection signal
Data Source
AI summary
A carrier substrate comprises monocrystalline silicon, and has a front face and a back face. The carrier substrate comprises:a surface region extending from the front face to a depth of between 800 nm and 2 microns, having less than 10 crystal-originated particles (COPs) (as detected by inspecting the surface using dark-field reflection microscopy);an upper region extending from the front face to a depth of between a few microns and 40 microns and having an interstitial oxygen (Oi) content less than or equal to 7.5E17 Oi/cm3 and a resistivity higher than 500 ohm·cm, anda lower region extending between the upper region and the back face and having a micro-defect (BMD) concentration greater than or equal to 1E8/cm3.A method is used to manufacture such a carrier substrate.