SOI Substrate Cleaving Along Voids for Smoother Layer Transfer

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Solution Overview

Problem

The existing methods for forming semiconductor-on-insulator (SOI) substrates face challenges in controlling the splitting of porous silicon layers, leading to rough surfaces, increased operation complexity, and potential damage to device layers due to unpredictable stress directions, resulting in lower productivity and higher costs.

Innovation Solution

The introduction of a silicon germanium (SiGe) enhanced layer-transfer approach, where voids are formed in semiconductor layers to act as break-away holes, confining the splitting direction and reducing surface roughness, thereby simplifying the removal of unnecessary layers and increasing the recycling rate of substrates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If existing methods are used to form SOI substrates by splitting porous silicon layers, then substrate separation can be achieved, but the splitting direction cannot be controlled leading to rough surfaces and potential damage to device layers

Engineering Contradiction:
Improvesurface smoothnessVSAvoidoperation complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent introduces voids as predetermined separation planes within the multilayer structure, dividing the structure into separable segments along controlled paths. This segmentation allows the split to occur precisely at the void locations rather than unpredictably through the porous silicon layer, achieving smooth surfaces while simplifying the operation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The voids are formed in advance during the layer formation process, before the actual substrate separation is needed. This preliminary creation of separation planes ensures that when splitting is required, the direction and location are predetermined, eliminating the need for complex real-time control and preventing damage to device layers.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If existing methods are used to split porous silicon layers, then substrate separation can be achieved, but unpredictable stress directions cause damage to device layers

Engineering Contradiction:
Improvedevice layer integrityVSAvoidproduction efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

By introducing voids as predetermined separation planes, the patent segments the multilayer structure into controllable sections. This ensures that stress during separation is concentrated at the void locations rather than being distributed unpredictably, protecting device layers from damage while maintaining efficient production through straightforward separation operations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The voids act as intermediary elements that mediate the separation process. Instead of directly splitting the porous silicon layer which causes unpredictable stress, the voids serve as intermediate separation planes that guide the split in a controlled manner, protecting device layers while enabling efficient substrate separation.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of manufacture

If existing methods are used without voids, then the process can be simpler, but surface roughness increases and layer removal becomes more difficult

Engineering Contradiction:
Improvelayer removal easeVSAvoidsurface roughness
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The voids create natural segmentation planes within the multilayer structure, allowing layers to be separated cleanly along predetermined paths. This segmentation makes layer removal easier while simultaneously ensuring smooth surfaces at the separation interfaces, resolving the contradiction between ease of manufacture and manufacturing precision.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method improves productivity and reduces operational costs by confining the splitting direction and reducing surface roughness, ensuring a smoother process and minimizing stress-induced damage to device layers.

Implementation Method 1

An epitaxial growth operation is performed to seal the trenches with a first semiconductor material, and a plurality of voids are formed in the first multilayered structure

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Implementation Method 2

The first multilayered structure is cleaved along the voids to separate the first substrate, the first etch stop layer, the first semiconductor layer and a first portion of the sacrificial layer from a second portion of the sacrificial layer, the second semiconductor layer, the second multilayered structure, the insulator layer and the second substrate

Methodology Applied
Scientific EffectMechanical stress-induced cleavage: Fracture Mechanics

Data Source

PatentUS12002813B2Method for forming semiconductor-on-insulator (SOI) substrate by cleaving a multilayer structure along voids to separate a substrate
Publication Date: 2024.06.04 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12002813B2 patent drawing
  • US12002813B2 patent drawing
  • US12002813B2 patent drawing

AI summary

A method for forming an SOI substrate is provided. The method includes following operations. A recycle substrate is received. A first multilayered structure is formed on the recycle substrate. A trench is formed in the first multilayered structure. A lateral etching is performed to remove portions of sidewalls of the trench to form a recess in the first multilayered structure. The trench and the recess are sealed with an epitaxial layer, and a potential cracking interface is formed in the first multilayered structure. A second multilayered structure is formed over the first multilayered structure. The device layer of the recycle substrate is bonded to an insulator layer over an carrier substrate. The first multilayered structure is cleaved along the potential cracking interface to separate the recycle substrate from the second multilayered structure, the insulator layer and the carrier substrate. The device layer is exposed.