SOI Semiconductor Dummy Gate Leakage Current Control

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Solution Overview

Problem

Semiconductor devices using SOI substrates face challenges with contact plug positional shifts, leading to increased leakage current and reduced breakdown voltage due to the formation of junctions between the contact plug and the substrate, which affects the device's performance and reliability.

Innovation Solution

The implementation of a semiconductor device configuration that includes a dummy gate electrode and dummy sidewall film on the element isolation region, preventing the contact plug from shifting towards the insulating layer and support substrate, thereby maintaining electrical insulation and reducing leakage current.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If the contact plug formation position shifts toward the element isolation region on an SOI substrate, then the contact plug may reach the insulating layer and support substrate, but leakage current increases and breakdown voltage decreases due to junction formation with the substrate

Engineering Contradiction:
Improvecontact plug formation positionVSAvoidleakage current and breakdown voltage
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent applies preliminary action by forming a dummy gate electrode and dummy sidewall film on the element isolation region before contact plug formation. These dummy structures are prepared in advance to prevent the contact plug from shifting toward the insulating layer and support substrate, thereby maintaining electrical insulation and reducing leakage current while improving TDDB life.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If the semiconductor device uses an SOI substrate to suppress short-channel characteristics and element variation, then mobility is improved, but contact plug positional shift causes increased leakage to the support substrate

Engineering Contradiction:
Improvemobility and element variationVSAvoidleakage current to support substrate
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent uses the dummy gate electrode and dummy sidewall film as intermediary structures between the contact plug and the support substrate. These intermediary structures prevent direct contact between the contact plug and the support substrate through the insulating layer, thereby eliminating the leakage path while maintaining the benefits of the SOI substrate structure.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Device complexity

If the contact plug is formed without dummy structures, then the device structure is simpler, but the contact plug may shift and form junctions with the support substrate increasing leakage

Engineering Contradiction:
Improvedevice structureVSAvoidleakage current reduction
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The dummy gate electrode and dummy sidewall film are formed in advance on the element isolation region to create a protective structure that prevents contact plug shift. This preliminary action ensures that even if the contact plug formation position shifts, the dummy structures will prevent direct contact with the support substrate, maintaining electrical insulation and reducing leakage current.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentEP3249688B1Semiconductor device
Publication Date: 2020.10.28 RENESAS ELECTRONICS CORP
  • EP3249688B1 patent drawingFigure 1
  • EP3249688B1 patent drawingFigure 2A~2B
  • EP3249688B1 patent drawingFigure 3A~3B

AI summary

Characteristics of a semiconductor device are improved. The semiconductor device is configured to include an SOI substrate including an active region and an element isolation region (element isolation insulating film), a gate electrode formed in the active region via a gate insulating film, and a dummy gate electrode formed in the element isolation region. A dummy sidewall film is formed on both sides of the dummy gate electrode, and is arranged to match or overlap a boundary between the active region and the element isolation region (element isolation insulating film). According to such a configuration, a plug can be prevented from deeply reaching, for example, an insulating layer and a support substrate even when a contact hole is formed to be shifted.