SOI High-Current N-Type Combined Semiconductor Device
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Solution Overview
Problem
SOI lateral insulated-gate bipolar devices have a low current density, leading to increased chip area and cost when trying to achieve high current driving capability, as they require larger device areas to compensate for this limitation.
Innovation Solution
A SOI integratable high-current N-type combined semiconductor device is designed with a P-type silicon substrate, buried oxide layer, P-type deep trench, N-type annular source region, and P-type body contact region, along with isolation regions and specific transistor configurations to enhance current density without increasing layout area, by connecting drain and base electrodes of different transistors for current amplification.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the area of SOI lateral insulated-gate bipolar devices is increased to achieve high current driving capability, then the current driving capability is improved, but the chip area is severely consumed and the cost is increased
Solution Approach 1:
The patent combines a PNP high-voltage bipolar transistor and an N-type lateral insulated-gate bipolar transistor into a single integrated device structure. The PNP transistor provides current amplification while the N-type device provides the main current path, achieving high current driving capability without proportionally increasing chip area. The shared substrate and integrated layout reduce the total area required compared to separate devices.
Solution Approach 2:
The N-type annular source region serves multiple functions: it acts as the source for the N-type lateral insulated-gate bipolar transistor, provides current path, and enables the integrated structure to function as both a voltage withstanding element and a current amplifying element. This multi-functionality reduces the need for separate dedicated structures.
2Device complexity
If conventional SOI lateral insulated-gate bipolar devices are used, then the device structure is simple, but the current density is not high enough
Solution Approach 1:
The patent merges a PNP high-voltage bipolar transistor with an N-type lateral insulated-gate bipolar transistor in a shared structure. The PNP transistor's current amplification capability enhances the overall current density without requiring a completely new device architecture, thus maintaining relative structural simplicity while significantly improving current density performance.
3Reliability
If high-voltage IGFETs are used to meet high withstand voltage requirements, then the input impedance is high, but the current driving capability is very limited and there is an inevitable contradiction between high withstand voltage and turn-on impedance
Solution Approach 1:
The patent combines a PNP high-voltage bipolar transistor (providing current amplification and low turn-on impedance) with an N-type lateral insulated-gate bipolar transistor (providing high input impedance and high withstand voltage). This integration allows the device to simultaneously achieve high withstand voltage, high current driving capability, and high input impedance, resolving the contradiction between these parameters.
Data Source
AI summary
A silicon on insulator N type semiconductor device, includes a N type drift region, a P type deep well, an N type buffer well, a P type drain region, an N type source region and a P type body contact region; a field oxide layer and a gate oxide layer arranged on a silicon surface, and a polysilicon lattice arranged on the gate oxide layer; and an N type triode drift region, a P type deep well, an N type triode buffer well, a P type emitting region, an N type base region, an N type source region and a P type body contact region; a field oxide layer and a gate oxide layer arranged on a silicon surface, and a polysilicon lattice arranged on the gate oxide layer.