High κ Bonding Structures for SOI Substrate Delamination Prevention
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Solution Overview
Problem
The low interfacial adhesion energy between oxide layers in semiconductor-on-insulator (SOI) substrates leads to voids and delamination during bonding and subsequent manufacturing processes, affecting the endurance, strength, and stability of the SOI substrate.
Innovation Solution
The use of high κ materials like Al2O3 for both bonding structures, which are bonded together to form a high κ-high κ bond interface with significantly higher adhesion energy, resistant to etching processes and subsequent manufacturing steps, ensuring a strong and void-free bond.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If oxide layers are used for bonding structures in SOI substrates, then the bonding process is simple and compatible with standard manufacturing, but the interfacial adhesion energy is low leading to voids and delamination
Solution Approach 1:
The patent changes the material parameter from conventional oxide (SiO2) to high κ material (such as HfO2, Al2O3, or TiO2) with dielectric constant greater than 3.9. This material substitution increases the interfacial adhesion energy at the bond interface, preventing void formation and delamination while maintaining compatibility with standard semiconductor manufacturing processes.
Solution Approach 2:
The patent employs composite material structures where high κ material layers are used in conjunction with conventional semiconductor materials. The high κ bonding structures are formed as composite layers that combine the advantages of high dielectric constant materials with proven manufacturing compatibility, creating a hybrid system that resolves the adhesion issue while preserving process simplicity.
2Reliability
If high κ materials are used for bonding structures, then the interfacial adhesion energy is significantly higher preventing voids and delamination, but the material selection and processing complexity increases
Solution Approach 1:
The patent specifies that the high κ material should have a dielectric constant greater than 3.9 and provides a list of suitable materials (HfO2, Al2O3, TiO2, etc.). By establishing clear material selection criteria and providing specific examples, the patent reduces the complexity of material selection while ensuring high interfacial adhesion energy and bond interface stability.
Solution Approach 2:
The patent employs thin films of high κ material that are deposited as relatively thin layers (typically tens to hundreds of nanometers). These thin high κ layers provide the necessary adhesion enhancement without requiring thick material deposition, thereby reducing processing complexity and maintaining compatibility with standard thin-film fabrication processes.
3Ease of manufacture
If conventional oxide bonding structures are used, then the manufacturing process is straightforward, but the bond interface is susceptible to delamination during etching and subsequent manufacturing steps
Solution Approach 1:
The patent changes the material composition from conventional oxide to high κ material, which fundamentally alters the interfacial properties. The high κ material forms a bond interface with significantly higher adhesion energy that resists delamination during etching and subsequent manufacturing steps, while the deposition processes remain compatible with standard semiconductor fabrication workflows.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the endurance, strength, and stability of the SOI substrate by preventing delamination and void formation, maintaining a strong bond interface throughout manufacturing processes.
Implementation Method 1
The use of high κ materials like Al2O3 for both bonding structures, which are bonded together to form a high κ-high κ bond interface with significantly higher adhesion energy
Data Source
AI summary
Various embodiments of the present application are directed to a method for forming a semiconductor-on-insulator (SOI) substrate without bond interface voids and/or without delamination between layers. In some embodiments, a first high κ bonding structure is formed over a handle substrate. A device layer is formed over a sacrificial substrate. Outer most sidewalls of the device layer are between outer most sidewalls of the sacrificial substrate. A second high κ bonding structure is formed over the device layer. The first high κ bonding structure is bonded to the second high κ bonding structure, such that the device layer is between the sacrificial substrate and the handle substrate. A first removal process is performed to remove the sacrificial substrate. The first removal process comprises performing a first etch into the sacrificial substrate until the device layer is reached.