SOI MOS Device Modeling for Junction Capacitance
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Solution Overview
Problem
Current MOSFET device modeling in IC CAD software, specifically BSIMSOI modeling, is inadequate for simulating the effects of source body junction bottom capacitance and drain body junction bottom capacitance in SOI MOS devices where source-drain injection does not reach the bottom, leading to reduced model precision and performance prediction accuracy.
Innovation Solution
A method is developed to create an SOI MOS device model that includes a primary MOS device model simulating source-drain injection reaching the bottom, along with separate models for source body and drain body PN junction bottom capacitances, allowing for the extraction of specific parameters to enhance simulation accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional BSIM SOI modeling is used, then modeling simplicity is maintained, but model precision deteriorates due to inability to accommodate source body junction bottom capacitance and drain body junction bottom capacitance effects
Solution Approach 1:
The patent segments the SOI MOS device model into multiple independent components: a primary MOS device model for the main device behavior, a source body PN junction bottom capacitance model for source region effects, and a drain body PN junction bottom capacitance model for drain region effects. This segmentation allows each component to be modeled separately and combined to achieve high overall precision while maintaining manageable complexity through modular parameter extraction.
2Ease of operation
If source-drain injection reaches the bottom, then device structure is simplified, but the ability to implement body leads along channel length direction is reduced
Solution Approach 1:
The patent introduces an intermediary modeling approach by adding separate PN junction bottom capacitance models that act as mediators between the primary MOS device model and the physical reality of non-reaching source-drain injection. These intermediary capacitance models capture the bottom junction effects without requiring structural modification, enabling body leads implementation while maintaining high model precision through parameter extraction from test structures.
Data Source
AI summary
The present invention provides a SOI MOS device modeling method. The SOI MOS device is one having a source-drain injection not reaching the bottom. The method comprises: a) establishing an overall model comprising a primary MOS device model simulating an SOI MOS device having the source-drain injection reaching the bottom, a source body PN junction bottom capacitance model simulating a source body PN junction bottom capacitance, and a drain body PN junction bottom capacitance model simulating a drain body PN junction bottom capacitance; and b) extracting parameters respectively for the primary MOS device model, the source body PN junction bottom capacitance model, and the drain body PN junction bottom capacitance model in the overall model. In the prior art, the source body junction bottom capacitance and the drain body junction bottom capacitance in the SOI MOS device having a source-drain injection not reaching the bottom affect the performances of the device. The modeling method of the present invention takes the effect into consideration, improves model precision, and can be effectively used for the simulation design of a device.