SOI Structure with Polycrystalline Silicon Interlayer for Low Electrical Losses
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Solution Overview
Problem
Existing semiconductor on insulator (SOI) structures experience significant electrical losses due to wave absorption by the support substrate, even with high resistivity enhancements, and previous methods using a polycrystalline silicon layer do not adequately reduce these losses.
Innovation Solution
A manufacturing process involving a substrate with a high resistivity support substrate, an oxide layer, and a polycrystalline silicon layer interleaved between the support substrate and the oxide layer, where the support substrate is treated to achieve resistivity greater than 500 Ω·cm, and the polycrystalline silicon layer is deposited after this treatment, with a thermal stabilization process at temperatures not exceeding 950°C for at least 10 minutes to maintain its polycrystalline character.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the support substrate resistivity is increased to over 500 Ω·cm to reduce wave absorption, then electrical losses are reduced, but the support substrate still absorbs part of the emitted waves resulting in insufficient loss reduction
Solution Approach 1:
A polycrystalline silicon layer is introduced as an intermediary between the support substrate and the oxide layer. This intermediate layer acts as a buffer that further reduces electrical losses and wave absorption, complementing the high resistivity of the support substrate. The polycrystalline structure with defective boundaries provides additional charge-carrier traps, enhancing the overall insulation effect.
Solution Approach 2:
The invention creates a composite structure combining high resistivity monocrystalline silicon support substrate with polycrystalline silicon layer. This composite approach leverages the high bulk resistivity of the monocrystalline substrate and the high trap density of the polycrystalline layer to achieve superior electrical loss reduction compared to either material alone.
2Loss of energy
If a polycrystalline silicon layer is deposited on the support substrate to provide charge-carrier traps and reduce conductivity, then leakage currents are reduced, but the technique does not reduce electrical losses satisfactorily
Solution Approach 1:
The support substrate is pre-treated to achieve high resistivity (over 500 Ω·cm) before depositing the polycrystalline silicon layer. This preliminary enhancement of the substrate's electrical properties creates a more effective base that, when combined with the polycrystalline layer, achieves satisfactory electrical loss reduction that neither element could achieve alone.
3Manufacturing precision
If thermal stabilization is conducted at high temperature to complete the SMART CUT process, then the semiconductor layer is properly formed, but the polycrystalline character of the silicon layer may be compromised
Solution Approach 1:
The thermal stabilization process parameters are optimized to maintain the polycrystalline structure. By controlling temperature and time parameters within specific ranges, the process achieves proper semiconductor layer formation while preserving the beneficial polycrystalline character with its charge-carrier trapping properties.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The process results in an SOI structure with average resistivity greater than 10,000 Ohms·cm, effectively reducing electrical losses and maintaining the polycrystalline structure of the silicon layer, thereby enhancing the electrical performance of semiconductor components.
Implementation Method 1
oxidizing a donor substrate made of semiconductor material to form an oxide layer on a surface thereof
Implementation Method 2
implanting ions in the donor substrate to form an embrittlement zone therein
Implementation Method 3
bonding the donor and support substrates together with the oxide layer being located therebetween at a bonding interface
Implementation Method 4
fracturing the donor substrate at the embrittlement zone to transfer to the support substrate a thin layer of semiconductor material
Implementation Method 5
conducting at least one thermal stabilization of the SeOI structure, at a temperature not exceeding 950° C., and for a time of at least 10 minutes
Data Source
AI summary
A manufacturing process for a semiconductor-on-insulator structure having reduced electrical losses and which includes a support substrate made of silicon, an oxide layer and a thin layer of semiconductor material, and a polycrystalline silicon layer interleaved between the support substrate and the oxide layer. The process includes a treatment capable of conferring high resistivity to the support substrate prior to formation of the polycrystalline silicon layer, and then conducting at least one long thermal stabilization on the structure at a temperature not exceeding 950° C. for at least 10 minutes.