SOI RF Filter Stacking With Vias for Lower Signal Loss
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Solution Overview
Problem
Existing radio-frequency (RF) filters on silicon-on-insulator (SOI) substrates face challenges in minimizing signal degradation and reducing the overall footprint and volume of RF devices.
Innovation Solution
The implementation of a radio-frequency (RF) device with a silicon die featuring a plurality of vias for electrical connections and an RF flip chip mounted on one side, with the option to mount the second side in a flip-chip manner, allowing for the integration of filters on the SOI substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If filters are integrated on the SOI substrate close to RF circuits, then signal loss is reduced and performance is enhanced, but device footprint and volume increase
Solution Approach 1:
The patent transitions from planar integration to three-dimensional vertical stacking by mounting RF flip chips on the first side of the SOI substrate and positioning filters on the second side. This dimensional change allows filters to be placed close to RF circuits for reduced signal loss while maintaining a compact footprint, as components are arranged vertically rather than horizontally.
Solution Approach 2:
The patent implements a nested configuration where RF flip chips are mounted on the first side of the SOI substrate, and filters are integrated on the second side, creating a stacked arrangement. This nesting approach allows multiple functional layers to occupy the same lateral footprint, reducing overall device area while maintaining close proximity between RF circuits and filters.
2Volume of stationary object
If multiple components are integrated on a single SOI substrate, then device volume is reduced, but manufacturing complexity increases
Solution Approach 1:
The patent divides the integrated device into separate functional modules: RF flip chips containing RF circuits are mounted on the first side of the SOI substrate, while filters are integrated on the second side. This segmentation allows each component to be manufactured and tested independently before final assembly, reducing overall manufacturing complexity while achieving compact volume integration.
Solution Approach 2:
The patent employs preliminary mounting of RF flip chips on the first side of the SOI substrate before final filter integration on the second side. This preliminary action allows for staged manufacturing and testing, reducing the complexity of simultaneous multi-component integration while achieving the volume reduction benefits of compact integration.
Data Source
AI summary
Devices and methods related to radio-frequency (RF) filters on silicon-on-insulator (SOI) substrate. In some embodiments, an RF device can include a silicon die such as an SOI die including a first side and a second side. The silicon die can further include a plurality of vias, with each via configured to provide an electrical connection between the first side and the second side of the silicon die. The RF device can further include at least one RF flip chip mounted on the first side of the silicon die. The silicon die can include, for example, an RF circuit such as a switch circuit, and the RF flip chip can include, for example, a filter such as a surface acoustic wave (SAW) filter.