Back-Illuminated SOI Sensor With Boron Backside for Deep UV Detection
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Solution Overview
Problem
Current image sensors face challenges in efficiently detecting high-energy photons at deep UV and vacuum UV wavelengths due to high reflectivity and absorption issues, leading to low signal-to-noise ratios and potential damage from high-intensity light sources, especially when operating at high temperatures that can damage CMOS circuits.
Innovation Solution
The development of a back-thinned image sensor with a boron layer on its backside surface, featuring a monotonically decreasing p-type dopant concentration gradient, allows for finer metal interconnects and reduced warping, enabling higher sensitivity and efficiency in detecting DUV, VUV, EUV, and X-rays while maintaining a flat wafer for precise circuit connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a back-thinned sensor structure is used to improve quantum efficiency, then sensitivity to DUV/VUV photons is improved, but the sensor becomes more susceptible to damage from high-intensity light sources
Solution Approach 1:
An anti-reflection coating layer is introduced as an intermediary between the incident light and the silicon sensor surface. This coating layer is specifically designed to transmit DUV/VUV wavelengths while filtering out high-intensity harmful radiation, thereby protecting the back-thinned sensor structure without compromising its quantum efficiency
Solution Approach 2:
The sensor operates at cryogenic temperatures (e.g., 77K or lower) to change the thermal parameters of the silicon material. This temperature reduction increases the bandgap energy, reducing thermal noise and increasing resistance to high-intensity light damage while maintaining high quantum efficiency for DUV/VUV detection
2Measurement precision
If high-intensity light sources are used to improve signal-to-noise ratio, then detection capability is improved, but the risk of damage to the sensor and optics increases
Solution Approach 1:
The anti-reflection coating serves as a protective intermediary that allows sufficient light transmission for high signal-to-noise ratio operation while filtering out the most damaging portions of the spectrum, enabling safe operation with high-intensity light sources
Solution Approach 2:
The harmful high-intensity radiation is selectively extracted or removed from the incident light spectrum by the anti-reflection coating before it reaches the sensor, allowing the beneficial high-flux illumination to remain while the damaging components are eliminated
3Productivity
If finer metal interconnects are used to improve charge-to-voltage conversion efficiency, then sensor performance is improved, but manufacturing precision requirements increase
Solution Approach 1:
The sensor operates in the back-illuminated configuration, utilizing the third dimension (depth from back surface) to collect charges generated by DUV/VUV photons. This dimensional approach allows finer interconnects on the front surface to be used without compromising detection efficiency, as charge collection occurs independently in the bulk silicon volume
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the quantum efficiency and longevity of image sensors under high radiation flux, allowing for finer design rules and more efficient charge-to-voltage conversion, while preventing damage from high-intensity light sources and maintaining sensor flatness for precise interconnects.
Implementation Method 1
featuring a monotonically decreasing p-type dopant concentration gradient
Implementation Method 2
detecting DUV, VUV, EUV, and X-rays
Data Source
AI summary
An image sensor is fabricated by first heavily p-type doping the thin top monocrystalline silicon substrate of an SOI wafer, then forming a relatively lightly p-doped epitaxial layer on a top surface of the top silicon substrate, where p-type doping levels during these two processes are controlled to produce a p-type dopant concentration gradient in the top silicon substrate. Sensing (circuit) elements and associated metal interconnects are fabricated on the epitaxial layer, then the handling substrate and oxide layer of the SOI wafer are at least partially removed to expose a lower surface of either the top silicon substrate or the epitaxial layer, and then a pure boron layer is formed on the exposed lower surface. The p-type dopant concentration gradient monotonically decreases from a maximum level near the top-silicon/epitaxial-layer interface to a minimum concentration level at the epitaxial layer's upper surface.