SOI Substrate with Deuterium-Hydrogen Co-Doping Layer
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Solution Overview
Problem
Current methods for manufacturing silicon on insulator (SOI) substrates are costly due to the need for high deuterium pressure and do not effectively reduce parasitic capacitance between the drain and substrate.
Innovation Solution
A method involving the growth of deuterium and hydrogen co-doping layers on semiconductor substrates, followed by bonding and annealing to form a SOI substrate, which reduces parasitic capacitance and allows for the reuse of separated wafers, thereby lowering manufacturing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high deuterium pressure is used for annealing to remove dangling bonds, then the quality of the gate oxide-substrate interface is improved, but the manufacturing cost is increased
Solution Approach 1:
The patent changes the chemical composition parameter by using deuterium-hydrogen mixed gas instead of pure deuterium gas, and adjusts the pressure parameter to a lower range (1-100 Pa) while maintaining the annealing effect through optimized gas composition and processing conditions
Solution Approach 2:
The patent uses a composite gas atmosphere consisting of deuterium and hydrogen in specific ratios (Deuterium concentration: 10-90 at%), which combines the benefits of both gases to achieve effective dangling bond removal at lower pressures, reducing manufacturing cost while maintaining interface quality
2Reliability
If SOI substrate is used to reduce parasitic capacitance, then the performance of semiconductor integrated circuit is improved, but the manufacturing cost is increased
Solution Approach 1:
The patent optimizes multiple parameters including deuterium concentration (10-90 at%), pressure (1-100 Pa), and temperature to achieve effective SOI substrate manufacturing with reduced parasitic capacitance at lower costs
Solution Approach 2:
The patent reuses the separated first wafer as a substrate for subsequent processing, effectively copying its utility rather than discarding it, thereby reducing material waste and manufacturing cost while maintaining the quality of the SOI substrate
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively reduces parasitic capacitance and enhances the resilience of semiconductor devices to hot carrier effects without requiring high deuterium pressure, while also reducing manufacturing costs by enabling the reuse of separated wafers.
Implementation Method 1
irradiating the first semiconductor substrate via a ion beam for forming a deuterium and hydrogen co-doping layer
Implementation Method 2
annealing the first wafer and second wafer
Data Source
AI summary
The present invention application provides a method for manufacturing a SOI substrate, and the method comprising: providing a first semiconductor substrate; growing a first insulating layer on a top surface of the first semiconductor substrate for forming a first wafer; implanting a deuterium and hydrogen co-doping layer at a certain pre-determined depth of the first wafer; providing a second substrate; growing a second insulating layer on a top surface of the second semiconductor substrate for forming a second wafer; bonding the first wafer with the second wafer; annealing the first wafer and second wafer; separating a part of the first wafer from the second wafer; and forming a deuterium and hydrogen co-doping semiconductor layer on the second wafer.