Body Contacted SOI Transistor Parasitic Capacitance Reduction
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Solution Overview
Problem
Conventional body contacted semiconductor-on-insulator (SOI) metal gate transistors suffer from high parasitic gate capacitance, which degrades performance, and existing solutions either fail to provide precise control over body potential or do not effectively reduce parasitic capacitance.
Innovation Solution
The method involves removing the metal portion of the gate stack over the body contact region and forming a silicon-containing material that contacts the gate dielectric, increasing the effective gate dielectric thickness by more than 5 angstroms, thereby reducing parasitic capacitance in the body contact region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If a body contact is made in SOI technology by creating a T-shaped structure on the diffusion, then the body potential can be controlled and threshold voltage can be changed, but the gate capacitance is greatly increased leading to poor performance
Solution Approach 1:
The gate stack is segmented into two distinct regions: a device region with a complete metal gate stack for transistor operation, and a body contact region where the metal gate is removed to expose the gate dielectric. This segmentation allows the body contact region to provide potential control without the parasitic capacitance of a metal gate, while the device region maintains full transistor functionality.
Solution Approach 2:
The metal gate portion is extracted or removed from the body contact region, leaving only the gate dielectric and doped silicon-containing material. This extraction eliminates the source of parasitic capacitance in the body contact region while preserving the ability to control body potential through the exposed gate dielectric interface.
2Object-generated harmful factors
If the metal portion of the gate stack is removed over the body contact region, then parasitic capacitance is reduced, but the structure becomes more complex
Solution Approach 1:
Different structural qualities are applied to different regions: the device region maintains a complete metal gate stack structure optimized for transistor operation, while the body contact region uses a simplified structure with exposed gate dielectric and doped silicon-containing material optimized for potential control. This local differentiation reduces overall parasitic capacitance while maintaining necessary functionality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach achieves a significant reduction in parasitic capacitance, typically by more than 30%, while allowing for controllable body potential adjustment, improving the performance of SOI metal gate-containing transistors.
Implementation Method 1
Body contacted semiconductor-on-insulator (SOI) metal gate transistors suffer from high parasitic gate capacitance, which degrades performance
Data Source
AI summary
A body contacted semiconductor-on-insulator (SOI) metal gate containing transistor that has a reduced parasitic gate capacitance is provided in which a metal portion of a gate stack is removed over the body contact region and a silicon-containing material is formed that contacts the gate dielectric in the body contact region of an SOI substrate. This causes an increase of the effective gate dielectric thickness on the body contact region by greater than 5 angstroms (Å). This results in a lower parasitic capacitance at the body contact region.