SOI Transistor Thermal Dissipation via Substrate Integration
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Solution Overview
Problem
High voltage MOS transistors fabricated in thin semiconductor layers on insulators face heat dissipation issues due to low thermal conductivity, affecting their reliability and performance, while those in the supporting substrate benefit from better thermal properties but require integration with complementary MOS transistors in the thin layer.
Innovation Solution
An SOI component with MOS transistors formed in both the thin semiconductor layer and the supporting substrate, including a drift region and gate structures, is fabricated using impurity doping and dielectric isolation techniques to enhance thermal dissipation and integrate P-channel and N-channel transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If high voltage MOS transistors are fabricated in thin semiconductor layers, then device integration and SOI benefits are achieved, but heat dissipation deteriorates due to low thermal conductivity of insulator layer
Solution Approach 1:
The patent divides the transistor structure into two separate locations: high voltage MOS transistors are formed in the supporting substrate while complementary MOS transistors are formed in the thin semiconductor layer. This segmentation allows each transistor type to operate in its optimal thermal environment, with high voltage devices benefiting from superior heat dissipation in the substrate and standard devices maintaining SOI performance benefits.
Solution Approach 2:
The patent applies different structural configurations to different regions of the device. High voltage transistors are specifically placed in the supporting substrate region where thermal conductivity is high, while complementary transistors are placed in the thin semiconductor layer region. This local differentiation optimizes thermal management for each transistor type according to its specific requirements.
2Temperature
If high voltage MOS transistors are fabricated in supporting substrate, then heat dissipation improves due to high thermal conductivity, but integration with complementary MOS transistors becomes complex
Solution Approach 1:
The supporting substrate serves multiple functions: it acts as the structural foundation for the SOI structure, provides high thermal conductivity pathways for heat dissipation from high voltage transistors, and serves as the fabrication platform for both high voltage and complementary MOS transistors. This multi-functionality simplifies the overall device architecture despite the different operational requirements of the transistor types.
3Reliability
If complementary MOS transistors are formed in thin semiconductor layer, then SOI benefits such as lower junction capacitance are achieved, but thermal management worsens due to insulator layer separation
Solution Approach 1:
The patent segments the transistor placement by forming complementary MOS transistors exclusively in the thin semiconductor layer while forming high voltage MOS transistors in the supporting substrate. This segmentation allows complementary transistors to benefit from low junction capacitance and high-speed operation characteristics of SOI structures, while high voltage transistors benefit from superior thermal management in the substrate.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for improved heat dissipation and reliability of high voltage transistors by leveraging the thermal conductivity of the substrate while maintaining the benefits of SOI structures, enabling efficient integration of complementary MOS transistors.
Implementation Method 1
heat generated in high voltage transistors, if the transistors are formed in the supporting substrate, would be able to dissipate because of the relatively high thermal conductivity of the supporting substrate
Implementation Method 2
a thin layer of semiconductor material overlying an insulator layer
Implementation Method 3
A drift region of first conductivity type is located between the channel region and the drain region, the drift region having a second doping concentration less than the first doping concentration
Data Source
AI summary
SOI semiconductor components and methods for their fabrication are provided wherein the SOI semiconductor components include an MOS transistor in the supporting semiconductor substrate. In accordance with one embodiment the component comprises a semiconductor on insulator (SOI) substrate having a first semiconductor layer, a layer of insulator on the first semiconductor layer, and a second semiconductor layer overlying the layer of insulator. The component includes source and drain regions of a first conductivity type and first doping concentration in the first semiconductor layer. A channel region of a second conductivity type is defined between the source and drain regions. A gate insulator and gate electrode overlie the channel region. A drift region of the first conductivity type is located between the channel region and the drain region, the drift region having a second doping concentration less than the first doping concentration of the first conductivity determining dopant.