SOI Trench Isolation Fabrication with Depth Segmentation

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Solution Overview

Problem

Fabricating integrated circuits with trench isolations of different depths in SOI technology is complex and costly, and existing methods risk degrading the thin UTBOX layer, especially during etching steps, due to the difficulty in adapting bulk processing techniques to SOI substrates.

Innovation Solution

A process involving etching first trenches into a silicon substrate, depositing silicon nitride to form first trench isolations, etching second trenches to a greater depth, filling them with an electrical insulator, and exposing the silicon layer to form FET transistors, while using silicon oxide layers to protect the UTBOX layer and prevent short-circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If trench isolations of different depths are fabricated in SOI technology, then transistor threshold voltage control is improved, but fabrication process complexity increases

Engineering Contradiction:
Improvetransistor threshold voltage controlVSAvoidfabrication process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by forming the first trench isolations before forming the second trench isolations. The first trenches are etched to a first depth, filled with first electrical insulator material, and planarized before etching the second trenches to a second depth. This sequential preliminary preparation simplifies the overall fabrication process by establishing a stable foundation layer first, allowing subsequent deeper trenches to be formed without compromising the shallower isolation structures.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent segments the trench isolation formation into two distinct stages: first trench isolations formed to a first depth, and second trench isolations formed to a greater second depth. This segmentation allows each isolation level to be independently controlled and optimized, enabling precise transistor threshold voltage control while managing fabrication complexity through modular process steps.

Inventive Principle:
Principle #1Segmentation

2Ease of manufacture

If conventional etching methods are used, then trench isolations can be formed, but the UTBOX layer is degraded

Engineering Contradiction:
Improvetrench isolation formationVSAvoidUTBOX layer integrity
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent uses an intermediary approach by introducing a third electrical insulator material that is selectively removable to form the second trench isolations. This intermediary material allows the second trenches to be etched to greater depths without directly exposing or degrading the UTBOX layer, as the insulator material serves as a protective barrier during the etching process while still allowing the necessary electrical isolation to be achieved.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent forms the first trench isolations with insulator material as a preliminary protective layer before etching the second trenches. This preliminary action creates a buffer that protects the underlying UTBOX layer during subsequent deep etching operations, preventing direct contact between the etchant and the sensitive UTBOX while still enabling the formation of deeper isolation trenches.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If trench isolations extend to the ground plane interface, then electrical isolation is improved, but short-circuit risk increases for shallower trenches

Engineering Contradiction:
Improveelectrical isolationVSAvoidshort-circuit risk
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies local quality by providing different trench isolation depths for different functional requirements. First trench isolations extend to a first depth providing electrical isolation, while second trench isolations extend to a greater second depth for enhanced isolation in specific regions. This localized differentiation allows each area to have the appropriate isolation depth, preventing short-circuits in regions where shallower trenches would be insufficient while maintaining electrical isolation where deeper trenches are not required.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent segments the electrical isolation function into two levels: first trench isolations providing baseline electrical isolation, and second trench isolations providing enhanced isolation in specific regions. This segmentation allows the circuit design to optimize isolation depth locally, reducing short-circuit risk in critical areas without unnecessarily increasing process complexity or material usage throughout the entire substrate.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This process allows for the creation of trench isolations with different depths and materials without increasing fabrication complexity, enhancing the resistance of trench isolations to subsequent steps and protecting the UTBOX layer, thus reducing the risk of degradation and maintaining cost-effectiveness.

Implementation Method 1

depositing a silicon nitride layer on the silicon layer so as to fill said first trenches and form first trench isolations

Methodology Applied
Scientific EffectPhysical Vapour Deposition: Physical Vapour Deposition

Implementation Method 2

using silicon oxide layers to protect the UTBOX layer and prevent short-circuits

Methodology Applied
Scientific EffectPhysical barrier protection:

Implementation Method 3

carrying out a chemical etch until the silicon layer is exposed

Methodology Applied
Scientific EffectChemical Etching:

Data Source

PatentUS9275891B2Process for fabricating an integrated circuit having trench isolations with different depths
Publication Date: 2016.03.01 STMICROELECTRONICS (CROLLES 2) SAS
  • US9275891B2 patent drawing
  • US9275891B2 patent drawing
  • US9275891B2 patent drawing

AI summary

A process for fabricating an integrated circuit includes, in a stack of layers including a silicon substrate overlaid with a buried insulating layer overlaid with a silicon layer, etching first trenches into the silicon substrate, depositing a silicon nitride layer on the silicon layer to fill the first trenches and form first trench isolations, forming a mask on the silicon nitride layer, etching second trenches into the silicon substrate, in a pattern defined by the mask, to a depth greater than a depth of the first trenches, filling the second trenches with an electrical insulator to form second trench isolations, carrying out a chemical etch until the silicon layer is exposed, and forming a FET by forming a channel, a source, and a drain of the field effect transistor in the silicon layer.