Semiconductor Solder Bump with Copper Core Pillar
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Solution Overview
Problem
Existing solder bump structures in flip chip packaging exhibit weak joints and high joint resistance, particularly in fine pitch applications, leading to reliability issues and increased power consumption and heat dissipation.
Innovation Solution
A method of forming a semiconductor device with a substrate, a first conductive layer, a core pillar, and a second conductive layer within the core pillar, followed by forming a bump over the core pillar, where the core pillar's width is 40-60% of the bump's width, reducing solder joint resistance and enhancing strength and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If a traditional solder bump structure is used, then the manufacturing process is simple, but the joint strength is weak and reliability is poor
Solution Approach 1:
The solder bump is segmented into multiple functional layers: a core pillar (copper or nickel), intermediate metallization layers (nickel and copper), and an outer solder layer. This segmentation allows each layer to perform its specific function - the core pillar provides structural strength, the nickel layers provide barrier and bonding functions, and the solder layer provides joint formation capability.
Solution Approach 2:
The bump structure uses composite materials with different properties: copper for high conductivity and strength, nickel for barrier and bonding properties, and solder alloy for joint formation. This composite structure combines the advantages of each material to achieve both strength and reliability.
2Reliability
If a traditional solder bump structure is used, then the manufacturing process is simple, but the joint resistance is high
Solution Approach 1:
The electrical path is segmented into multiple conductive layers (copper core pillar, nickel intermediate layers, solder outer layer), where each layer contributes to reducing resistance. The copper core pillar provides a low-resistance pathway, while the nickel and solder layers provide additional conductive paths and bonding interfaces.
Solution Approach 2:
The resistance parameter is improved by changing the material composition and layer thickness parameters. The copper core pillar diameter is optimized to provide sufficient conductivity, while the nickel and solder layer thicknesses are controlled to minimize resistance while maintaining bonding strength.
3Productivity
If fine pitch applications are used, then the device density is high, but the solder joints become weaker
Solution Approach 1:
The bump structure is segmented with a substantial copper core pillar that maintains structural integrity even at reduced sizes. The core pillar acts as a rigid support that prevents joint failure in fine pitch applications where the overall bump size is reduced but the core provides mechanical strength.
Solution Approach 2:
The composite structure with copper core and solder shell provides both the small overall size needed for fine pitch and the internal strength provided by the copper core. This allows the bump to fit in tight spaces while maintaining adequate mechanical strength for reliable joints.
Data Source
AI summary
A flip chip semiconductor package has a substrate with a plurality of active devices. A contact pad is formed on the substrate in electrical contact with the plurality of active devices. A passivation layer, second barrier layer, and adhesion layer are formed between the substrate and an intermediate conductive layer. The intermediate conductive layer is in electrical contact with the contact pad. A copper inner core pillar is formed by plating over the intermediate conductive layer. The inner core pillar has a rectangular, cylindrical, toroidal, or hollow cylinder form factor. A solder bump is formed around the inner core pillar by plating solder material and reflowing the solder material to form the solder bump. A first barrier layer and wetting layer are formed between the inner core pillar and solder bump. The solder bump is in electrical contact with the intermediate conductive layer.