Semiconductor Solder Joint Void Prevention via Wettability Segmentation

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Solution Overview

Problem

Existing techniques for soldering semiconductor elements fail to adequately prevent voids and solder overflow in the solder joint, impacting heat dissipation and short-circuit reliability.

Innovation Solution

A manufacturing method involving a lead frame with distinct regions of varying solder wettability and spreadability, where a higher wettability region is used for initial solder placement and a lower region for spreading, ensuring the solder joint's edge aligns with the outer peripheral edge of the lower region to prevent overflow and void formation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-generated harmful factors

If molten solder is blocked by a bank portion during mounting, then solder overflow is prevented, but voids inside the solder cannot be sufficiently prevented

Engineering Contradiction:
Improvesolder overflowVSAvoidvoid generation prevention
Core Design Contradiction:
Object-generated harmful factorsVSReliability

Solution Approach 1:

The lead frame surface is divided into a first region with high wettability and spreadability for solder placement, and a second region with low wettability and spreadability that surrounds the first region. This local differentiation allows the solder to be contained and pressed properly without overflow while preventing void formation through controlled spreading.

Inventive Principle:
Principle #3Local quality

2Reliability

If solder is allowed to spread freely on the lead frame, then voids are reduced, but solder overflow occurs

Engineering Contradiction:
Improvevoid preventionVSAvoidsolder overflow
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

By creating regions with different wettability characteristics on the lead frame surface, the invention enables controlled solder spreading in the first region while the second region acts as a barrier to prevent overflow, thus resolving the contradiction between void prevention and overflow control.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The lead frame surface is segmented into functionally distinct regions: a central first region for solder acceptance and spreading, and a surrounding second region for containment. This segmentation allows simultaneous achievement of void prevention through spreading and overflow prevention through containment.

Inventive Principle:
Principle #1Segmentation

3Reliability

If the semiconductor element is pressed against the solder to wet and spread it, then voids are prevented, but solder may overflow beyond the desired area

Engineering Contradiction:
Improvevoid preventionVSAvoidsolder overflow
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The differentiated wettability regions guide the solder spreading process: the high wettability first region facilitates initial wetting and void prevention, while the low wettability second region naturally limits further spreading, preventing overflow even when the semiconductor element is pressed against the solder.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method effectively prevents voids and solder overflow, enhancing heat dissipation and short-circuit resistance by controlling solder flow and alignment.

Implementation Method 1

a first region and a second region that surrounds an outer periphery of the first region and is relatively lower in wettability and spreadability of solder than the first region

Methodology Applied
Scientific EffectWetting: Wetting

Implementation Method 2

to wet and spread the solder onto the second region

Methodology Applied
Scientific EffectSurface tension: Surface Tension

Data Source

PatentUS20230064063A1Manufacturing method for semiconductor device and semiconductor device
Publication Date: 2023.03.02 ASTEMO LTD
  • US20230064063A1 patent drawing
  • US20230064063A1 patent drawing
  • US20230064063A1 patent drawing

AI summary

Since the solder 106 temporarily remaining in the first region 301 is in a state of being high in curvature, it is in point contact with the semiconductor element 105 at the vertex of the solder 106. Thereafter, the solder 106 is gradually wetted and spread from the center part to the peripheral part and from the first region 301 to the second region 302 while the semiconductor element 105 is pressed against the solder 106. At this time, since the solder 106 wets and spreads while discharging air, generation of voids can be suppressed.