SONOS Top Blocking Oxide Thickness Variation
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Solution Overview
Problem
The variation in top blocking oxide thickness in SONOS memory cells due to the age and cycle count of phosphoric acid used in the manufacturing process leads to batch-to-batch inconsistencies, affecting programming windows and causing early reliability failures and yield loss.
Innovation Solution
The process eliminates the use of a sacrificial capping nitride layer and hot phosphoric acid, instead using an in situ steam generation (ISSG) gate oxidation process to form the top blocking oxide immediately before gate polysilicon deposition, ensuring consistent thickness and reducing ONO line width variation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If hot phosphoric acid is used to remove the sacrificial capping nitride layer, then the capping nitride is effectively removed, but the top blocking oxide thickness varies significantly due to acid age and cycle count
Solution Approach 1:
The patent removes the sacrificial capping nitride layer entirely from the process flow, eliminating the source of the problem. Instead of using hot phosphoric acid to remove it, the process forms the top blocking oxide in situ immediately before gate polysilicon deposition, so no separate removal step is needed. This extracts the problematic capping nitride removal step from the manufacturing process.
Solution Approach 2:
The top blocking oxide is formed in advance during the ISSG gate oxidation process, right before gate polysilicon deposition. This preliminary formation of the top blocking oxide eliminates the need for subsequent removal and reformation steps that would expose the oxide to variable chemical treatments. The oxide is prepared in its final state upfront, preventing later thickness variations.
2Reliability
If a sacrificial capping nitride layer is used to protect the ONO layer, then the ONO layer is protected during processing, but the process complexity increases and ONO line width variation occurs
Solution Approach 1:
The sacrificial capping nitride layer is completely removed from the process. The patent uses the ISSG gate oxidation process itself to form the top blocking oxide without requiring a separate capping nitride layer for protection. This extraction simplifies the process by eliminating unnecessary materials and steps while maintaining the protective function through direct oxide formation.
Solution Approach 2:
The ISSG gate oxidation process serves multiple functions simultaneously: it forms the gate oxide and also creates the top blocking oxide layer in situ. This multi-functionality eliminates the need for separate protective capping layers, as the oxidation process itself provides both the structural oxide and the protective top blocking layer in a single step.
3Ease of manufacture
If hot phosphoric acid dipping is used to remove capping nitride, then the nitride is removed, but manufacturing time and chemical consumption increase
Solution Approach 1:
The patent extracts and eliminates the hot phosphoric acid dipping step entirely by not using a sacrificial capping nitride layer that requires removal. The top blocking oxide is formed in situ during the necessary ISSG gate oxidation process, so no separate chemical removal step is needed, thereby eliminating the associated time and chemical consumption.
Solution Approach 2:
The top blocking oxide is formed in advance during the ISSG gate oxidation process before any subsequent steps. This preliminary formation eliminates the need for later removal and reformation operations, consolidating the oxide creation into a single early step that reduces overall manufacturing time and chemical usage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces top blocking oxide thickness variation, enhances repeatability, and minimizes ONO line width shrinkage, resulting in more stable and consistent SONOS cell performance, while also reducing manufacturing costs and cycle time.
Implementation Method 1
an in situ steam generation (ISSG) gate oxidation process to form the top blocking oxide
Implementation Method 2
in situ steam generation (ISSG) gate oxidation process
Data Source
AI summary
The invention provides a method for use in forming a semiconductor device, the semiconductor device comprising a primary area and a periphery area, the method comprising: providing a substrate on which is situated: a stack in the primary area, the stack comprising a first oxide layer on the substrate, an oxynitride layer on the first oxide layer and a second oxide layer on the oxynitride layer; and a third oxide layer in the periphery area, the method further comprising: substantially removing the second oxide layer from the primary area and the third oxide layer from the periphery area; forming a fourth oxide layer in at least the primary area by an in situ steam generation (ISSG) process; and thereafter forming a polycrystalline semiconductor layer on the fourth oxide layer without any intervening oxidation process steps. Embodiments of the invention, when applied to, for example, the manufacture of SONOS devices, have the advantages that batch-to-batch variation of the thickness of the top blocking oxide of the ONO stack is reduced or eliminated, and ONO line width variation is reduced or eliminated.