SONOS Memory Sidewall Oxide Protection via Spacer

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Solution Overview

Problem

The isotropic nature of wet etching in semiconductor manufacturing leads to lateral etching issues, damaging the top oxide layers in SONOS memory structures, which compromises the stability and performance of memory storage.

Innovation Solution

A method is introduced where a first oxide layer and a silicon oxynitride layer are deposited, followed by dry etching of the silicon oxynitride layer and wet etching of the first oxide layer, with a second oxide layer grown to form a spacer that protects against sidewall oxide loss during subsequent wet processes, ensuring the stability of the memory structure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If wet etching is used to remove the first oxide layer, then the etching process can be performed with high selectivity and without plasma damage, but lateral etching occurs due to isotropic nature, damaging the top oxide layers and reducing memory stability

Engineering Contradiction:
Improveease of wet etching processVSAvoidprecision of oxide layer removal
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

A second oxide layer is grown in advance on the silicon oxynitride layer before the wet etching step. This preliminary action creates a protective barrier that prevents lateral etching damage to the top oxide layers during the subsequent wet etching process, while still allowing the wet etching to effectively remove the first oxide layer.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If wet etching is used to remove the first oxide layer, then the process is simple and effective, but the isotropic etching causes lateral erosion of the top oxide layers, compromising memory storage stability

Engineering Contradiction:
Improveefficiency of oxide layer removalVSAvoidstability of memory storage
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The second oxide layer is grown beforehand to provide protective spacers on the sidewalls. This preliminary protective measure allows the wet etching to proceed efficiently without compromising the reliability of the memory structure, as the spacers prevent lateral erosion that would otherwise damage the top oxide layers.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The second oxide layer acts as an intermediary protective layer between the wet etching process and the top oxide layers. It mediates the interaction by providing a barrier that prevents the harmful lateral etching from reaching the critical memory structure, while allowing the etching process to continue effectively.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Manufacturing precision

If the second oxide layer is grown early to protect sidewalls, then lateral etching damage is prevented, but the conforming rate and reliability are reduced without proper timing

Engineering Contradiction:
Improveprecision of sidewall protectionVSAvoidconforming rate of device
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The growth timing of the second oxide layer is dynamically adjusted based on the process stage. It is grown at the optimal moment before wet etching to provide protection, and its thickness and growth conditions are optimized to ensure both sidewall protection and high conforming rate, resolving the contradiction between precision and reliability.

Inventive Principle:
Principle #15Dynamics

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method effectively prevents film loss and damage to the oxide layers during wet etching, enhancing the stability and performance of the SONOS memory by modifying the growth sequence of the second oxide layer, thereby improving the conforming rate and reliability of the device.

Implementation Method 1

removing the silicon oxynitride layer 13 in the logic area by means of dry etching

Methodology Applied
Scientific EffectDry etching: Plasma

Implementation Method 2

removing the first oxide layer 12 in the logic area by means of wet etching

Methodology Applied
Scientific EffectWet etching: Chemical Bonding

Implementation Method 3

growing a second oxide layer 14 on silicon oxynitride layer 13 and on logic area

Methodology Applied
Scientific EffectThermal oxidation: Oxidation

Data Source

PatentUS7951674B2Method for fabricating a SONOS memory
Publication Date: 2011.05.31 SHANGHAI INTEGRATED CIRCUIT RESEARCH & DEVELOPMENT CENTER CO LTD
  • US7951674B2 patent drawing
  • US7951674B2 patent drawing
  • US7951674B2 patent drawing

AI summary

The present invention provides a method for making SONOS memory, comprising the following steps: depositing silicon oxide layer and silicon oxynitride layer in sequence on underlayer; coating a layer of photoresist on the silicon oxynitride layer; removing part of the photoresist and form the logic area; removing silicon oxynitride layer in the logic area; removing the bottom oxide layer in the logic area; growing top oxide layer on the silicon oxynitride layer and logic area; removing the top oxide layer in the logic area; growing gate oxide layer; forming device structure of SONOS and logic area. The present invention can avoid the damage of top oxide layer and lateral etching in wet etching so as to improve the defect-free rate of devices.