SOT Memory Seed Layer for Thermal Stability
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Solution Overview
Problem
The semiconductor industry faces challenges in achieving thermal stability and high tunnel magnetoresistance (TMR) in Magnetic Tunnel Junctions (MTJs) during thermal processing, as existing technologies suffer from degradation of magnetization and crystallinity without a seed layer for the pinned layer, leading to reduced retention and efficiency in spin-orbit torque (SOT) magnetoresistive memory devices.
Innovation Solution
A folded SOT magnetoresistive memory device is formed with a pinned layer in contact with a seed layer, enhancing thermal stability, and a capping layer is used to increase perpendicular magnetic anisotropy (PMA) and improve the retention of the free layer, thereby maintaining high TMR and thermal stability through the spin Hall effect and proper layer configurations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a pinned layer is formed without a seed layer, then the manufacturing process is simpler, but thermal stability and TMR are degraded during thermal processing
Solution Approach 1:
A seed layer is formed prior to the pinned layer to prepare the substrate for subsequent thermal processing. This preliminary action ensures that when thermal processing occurs later in the manufacturing sequence, the pinned layer maintains its magnetization and crystallinity, thereby resolving the contradiction between manufacturing simplicity and thermal stability.
Solution Approach 2:
The seed layer acts as a protective cushion that prevents degradation of the pinned layer during thermal processing. By placing this protective layer beforehand, the patent shields the pinned layer from thermal damage, maintaining TMR and thermal stability without complicating the overall manufacturing process.
2Device complexity
If thermal processing is performed without a seed layer, then processing steps are reduced, but magnetization and crystallinity of the pinned layer are degraded
Solution Approach 1:
The seed layer is deposited as a preliminary step before thermal processing to ensure the pinned layer's magnetization and crystallinity are preserved. This preliminary protective measure allows thermal processing to proceed without degrading the magnetic properties, thus maintaining composition stability without significantly increasing device complexity.
3Device complexity
If the free layer lacks sufficient perpendicular magnetic anisotropy, then the device structure is simpler, but retention is reduced
Solution Approach 1:
A composite structure comprising the free layer, capping layer, and underlying memory stack is formed to achieve sufficient perpendicular magnetic anisotropy. The capping layer with high spin-orbit coupling strength enhances the PMA of the free layer through the spin Hall effect, improving retention while maintaining a relatively simple overall device structure.
Solution Approach 2:
The spin-orbit torque parameter is optimized by selecting a capping layer material with high spin-orbit coupling strength. This parameter change enhances the perpendicular magnetic anisotropy of the free layer, thereby improving retention without requiring significant structural modifications.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides improved thermal stability and retention in SOT magnetoresistive memory devices by ensuring the pinned layer's stability and the free layer's anisotropy, enhancing the overall performance and efficiency of the memory device.
Implementation Method 1
a capping layer is used to increase perpendicular magnetic anisotropy (PMA) and improve the retention of the free layer, thereby maintaining high TMR and thermal stability through the spin Hall effect
Data Source
AI summary
A method includes forming a memory stack over a substrate. A dielectric layer is deposited to cover the memory stack. An opening is formed in the dielectric layer. The opening does not expose the memory stack. A spin-orbit-torque (SOT) layer is formed in the opening. A free layer is formed over the dielectric layer to interconnect the memory stack and the SOT layer.