SOT MRAM Dielectric Interface for Lower Programming Current

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Solution Overview

Problem

Conventional Spin-Transfer Torque (STT) MRAM cells face reliability issues due to programming currents passing through the tunnel layer, leading to degradation or damage.

Innovation Solution

Incorporating a dielectric interfacial layer between the spin orbit coupling layer and the free layer in Spin Orbit Torque (SOT) MRAM cells, which enhances spin polarization efficiency and reduces the programming current without compromising the spin polarized current.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If programming current passes through the tunnel layer in STT MRAM cells, then the MRAM cell can be programmed, but the tunnel layer degrades or damages leading to reliability problems

Engineering Contradiction:

ImproveMRAM cell reliabilityVSAvoidtunnel layer degradation

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent introduces a spin orbit coupling layer as an intermediary component between the current path and the tunnel layer. This mediator layer enables spin-orbit coupling to generate spin-polarized current that acts on the free layer without requiring direct current flow through the tunnel layer, thus protecting the tunnel layer from degradation while maintaining programming functionality

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent replaces the direct electrical current mechanism (STT) with a spin-orbit coupling mechanism (SOT). Instead of using charge current directly to switch the magnetic state through the tunnel layer, the system uses spin current generated via spin-orbit coupling in the spin orbit coupling layer to exert torque on the free layer, substituting the mechanical/electrical direct interaction with a quantum mechanical spin interaction

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

2Use of energy by moving object

If a dielectric interfacial layer is inserted between the spin orbit coupling layer and the free layer, then spin polarization efficiency is improved and programming current is reduced, but the device structure becomes more complex

Engineering Contradiction:

Improveprogramming currentVSAvoiddevice structure

Core Design Contradiction:

Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The patent applies local quality by inserting a dielectric interfacial layer specifically at the interface between the spin orbit coupling layer and the free layer, where it is most needed to enhance spin polarization efficiency. This localized modification improves the overall device performance and reduces programming current requirements without requiring changes to the entire device structure

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The patent employs composite material structure by combining the spin orbit coupling layer with a dielectric interfacial layer and the free layer. This composite structure leverages the unique properties of each material layer - the spin orbit coupling layer for generating spin current, the dielectric layer for enhancing spin polarization, and the free layer for magnetic state storage - to achieve improved overall performance

Inventive Principle:

Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The dielectric interfacial layer improves the efficiency of spin polarized current generation, allowing programming with a smaller current and enhancing the reliability of SOT MRAM cells.

Implementation Method 1

the spin orbit coupling layer is configured to generate spin polarized carriers

Methodology Applied

Scientific EffectSpin Hall Effect: Hall Effect

Data Source

PatentUS12527002B2Sot MRAM having dielectric interfacial layer and method forming same

Publication Date: 2026.01.13 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A method includes depositing a plurality of layers, which includes depositing a spin orbit coupling layer, depositing a dielectric layer over the spin orbit coupling layer, depositing a free layer over the dielectric layer, depositing a tunnel barrier layer over the free layer, and depositing a reference layer over the tunnel barrier layer. The method further includes performing a first patterning process to pattern the plurality of layers, and performing a second patterning process to pattern the reference layer, the tunnel barrier layer, the free layer, and the dielectric layer. The second patterning process stops on a top surface of the spin orbit coupling layer.