SOT-MRAM Row Layout for Concurrent Read-Write Isolation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing MRAM technologies face challenges in efficiently performing concurrent writing and reading operations in a matrix of Spin-Orbit Torque MRAM (SOT-MRAM) cells, leading to inefficiencies and potential interference between writing and reading modes.
Innovation Solution
The implementation of a matrix structure for SOT-MRAM cells, where each row operates in either writing or reading mode simultaneously, with specific voltage configurations and current directions to isolate and manage writing and reading operations, utilizing sense amplifiers to detect voltage changes on bit lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If concurrent writing and reading operations are performed in a matrix of SOT-MRAM cells, then productivity is improved, but interference between writing and reading modes increases
Solution Approach 1:
The memory matrix is divided into separate row groups, where each group is dedicated to either writing or reading operations. This segmentation allows concurrent operations in different row groups without interference, as writing operations in one row group do not affect reading operations in another row group.
Solution Approach 2:
Sense amplifiers are introduced as intermediary components to detect voltage changes on bit lines during reading operations. These sense amplifiers isolate the reading operation from the writing operation, allowing concurrent execution by mediating the detection process and preventing direct interference between the two operation modes.
2Object-affected harmful factors
If specific voltage configurations and current directions are used to isolate writing and reading operations, then interference is reduced, but device complexity increases
Solution Approach 1:
Different voltage configurations and current directions are applied locally to specific row groups based on their operational mode. Writing row groups receive write-appropriate voltage configurations while reading row groups receive read-appropriate configurations. This localized approach reduces interference without requiring complex global control, as each row group is independently configured.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for concurrent and efficient writing and reading operations in SOT-MRAM cells, reducing interference and enhancing the overall performance and reliability of the memory device.
Implementation Method 1
The resistance of the magnetic tunnel junction depends upon the relative alignment of the magnetization of the two ferromagnetic layers
Implementation Method 2
the flow of an electric current through the conductive layer generates a spin-orbit torque which is used to manipulate a magnetic state of the magnetic tunnel junction of the memory cell
Data Source
AI summary
A first write bit line and a first read bit line are coupled to a first SOT-MRAM cell and a second SOT-MRAM in a first column. A second write bit line and a second read bit line are coupled to a third SOT-MRAM cell and a fourth SOT-MRAM in a second column. The first write bit line and the first read bit line are configured to cause a first write current to pass through the first SOT-MRAM cell and to cause a first read current passing the second SOT-MRAM cell during a same time period. The second write bit line and the second read bit line are configured to cause a second write current to pass through the third SOT-MRAM cell and to cause a second read current passing the fourth SOT-MRAM during a same time period. The first write current and the second write current are opposite in flow direction.