SOT-MRAM Channel Stack Using Dielectric Dusting to Balance Resistance
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In SOT-MRAM systems, the resistance of the SOT channel layer is often much smaller than other components, leading to increased power consumption due to elevated resistance values of the MRAM cell, which poses challenges for circuitry design, especially as technology nodes shrink and current variations become more critical.
Innovation Solution
A new structure for the SOT channel is introduced, featuring multiple heavy metal layers with discrete dielectric dusting layers positioned between them, where the dielectric molecules are scattered and controlled to be thinner than their size, enhancing the conversion of in-plane current to spin torque, thus increasing the vertical spin current efficiency and maintaining a balanced resistance across the write channel.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the SOT channel layer resistance is increased to match other circuit components, then power consumption is reduced, but the conversion efficiency from in-plane current to spin torque deteriorates
Solution Approach 1:
The patent changes the physical and chemical parameters of the SOT channel layer by introducing multiple heavy metal layers with different materials (e.g., Pt, Pd, Ir) and controlling their thicknesses (5-50 nm each). Dielectric layers (SiO2, Si3N4, Al2O3) with controlled thickness (1-10 nm) are inserted between heavy metal layers to modify resistance while maintaining spin torque generation efficiency through optimized material composition and structural parameters
Solution Approach 2:
The patent creates a composite SOT channel structure by stacking multiple heavy metal layers (Pt, Pd, Ir, Ta, W) with dielectric layers in between. This composite structure allows simultaneous optimization of resistance (through dielectric layers) and spin torque efficiency (through heavy metal layer materials with high spin-orbit coupling), resolving the contradiction between power consumption and conversion efficiency
2Power
If multiple heavy metal layers with dielectric dusting layers are introduced to improve conversion efficiency, then write current is reduced, but device complexity increases
Solution Approach 1:
The SOT channel layer is segmented into multiple discrete heavy metal layers (typically 2-5 layers) with thin dielectric layers between them. Each heavy metal layer can be independently optimized for spin-orbit coupling properties, while dielectric layers provide resistance control. This segmentation allows achieving low write current through cumulative spin torque effects without requiring a single complex material
Solution Approach 2:
Different heavy metal layers are assigned different materials (Pt, Pd, Ir, Ta, W) based on their local functional requirements - some layers prioritize high spin Hall angle for efficient spin current generation, while others focus on electrical conductivity or interface quality. Dielectric layers are strategically placed at specific interfaces to provide localized resistance control, enabling optimized write current with manageable device complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This structure allows for a lower write current to achieve the same spin current and torque, offsetting the negative effects of increased resistance, thereby improving power efficiency and matching the resistance value of the SOT channel with other circuit components.
Implementation Method 1
Spin torque is induced by the in-plane current injected through the heavy metal layer under the spin-orbit coupling effect
Implementation Method 2
which generally includes one or more of the Rashba effect or the spin Hall effect ('SHE effect')
Implementation Method 3
which generally includes one or more of the Rashba effect or the spin Hall effect ('SHE effect')
Implementation Method 4
Due to the tunnel magnetoresistance effect, the resistance value between the reference layer and the free layer changes with the magnetization polarity switch in the free layer
Data Source
AI summary
The disclosure is directed to spin-orbit torque (“SOT”) magnetoresistive random-access memory (“MRAM”) (“SOT-MRAM”) structures and methods. A SOT channel of the SOT-MRAM includes multiple heavy metal layers and one or more dielectric dusting layers each sandwiched between two adjacent heavy metal layers. The dielectric dusting layers each include discrete molecules or discrete molecule clusters of a dielectric material scattered in or adjacent to an interface between two adjacent heavy metal layers.