SOT-MRAM Current-Driven Circuit for Uniform Write Current
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Solution Overview
Problem
SOT-MRAM memories face challenges in precisely controlling write currents due to parasitic routing resistances and leakage currents, leading to non-uniform write current amplitudes and complexity in memory circuit sizing, especially when using voltage-driven systems.
Innovation Solution
A current-driven system is employed, utilizing a current generator and biasing circuit to supply constant reference currents for both write and read operations, decoupling the write path from the read path and minimizing the impact of parasitic resistances and leakage currents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If voltage-driven systems are used in SOT-MRAM memories, then write operations can be performed, but parasitic routing resistances and leakage currents cause non-uniform write current amplitudes and complexity in memory circuit sizing
Solution Approach 1:
The patent replaces voltage-driven write operations with current-driven write operations. Instead of applying a voltage to the bit line and relying on the circuit to drive current through the MTJ, a current source directly provides the write current to the bit line. This substitution eliminates the problems caused by parasitic routing resistances and leakage currents, as the current source directly controls the write current amplitude without being affected by voltage drops or leakage paths in the routing. The current-driven approach ensures uniform write current amplitudes across all memory cells regardless of their position in the array.
2Productivity
If voltage-driven systems are used, then write operations can be performed, but the system requires complex memory circuit sizing to account for parasitic effects
Solution Approach 1:
The patent replaces voltage-driven write operations with current-driven write operations. Instead of applying a voltage to the bit line and relying on the circuit to drive current through the MTJ, a current source directly provides the write current to the bit line. This substitution eliminates the problems caused by parasitic routing resistances and leakage currents, as the current source directly controls the write current amplitude without being affected by voltage drops or leakage paths in the routing. The current-driven approach ensures uniform write current amplitudes across all memory cells regardless of their position in the array.
3Speed
If write current amplitude is increased to improve write speed in STT-MRAM, then write speed improves, but the current flows through the MTJ pillar causing wear and reducing device lifespan
Solution Approach 1:
The patent segments the write current path into two separate components: a spin Hall effect line that carries the write current parallel to the MTJ layers without passing through them, and the MTJ pillar that only carries read currents. This segmentation allows the write current to be increased for faster write speeds without causing wear to the MTJ pillar, as the heavy current flow is confined to the spin Hall effect line which is designed to handle such currents. The MTJ pillar is protected from high current stress while still maintaining its function for data storage and read operations.
4Reliability
If SOT-MRAM decouples write and read paths, then write current can be increased without MTJ wear, but parasitic routing resistances still affect current control precision
Solution Approach 1:
The patent employs current sources that directly drive the bit lines with precise write currents. Each current source is configured to provide a specific write current amplitude that flows through the spin Hall effect line and generates the necessary spin-orbit coupling to switch the MTJ state. The current sources are designed to compensate for any parasitic effects in the routing, ensuring that the actual write current delivered to each memory cell matches the intended value. This self-service approach to current control eliminates the need for complex compensation circuits and achieves high precision write current control despite the presence of parasitic routing resistances.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution ensures consistent write currents across memory cells, simplifies memory circuit sizing, reduces energy consumption, and enhances memory endurance by eliminating parasitic effects, while allowing flexible control of current amplitudes for different data states.
Implementation Method 1
Writing is performed by injecting a current into a track or line placed in a plane perpendicular to the pillars, which can be made of a heavy metal such as tungsten. It is based on the spin Hall effect.
Implementation Method 2
STT meaning spin transfer torque or spin transfer torque in French, referring to a phenomenon occurring when a spin-polarized current flows through a magnetic material and affects the magnetization.
Implementation Method 3
The information can be read by measuring the cell's electrical resistance.
Data Source
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Figure 5
AI summary
A random access memory electronic circuit comprising an array (100) of memory cells (10), each including at least one magnetic pillar and a spin-interacting Hall effect line forming a tripole, each cell (10) further comprising a means for selecting the connection to the terminals of said tripole, a. a terminal (WL(k)) of each cell being connected in the circuit for selecting memory cells of the array according to a first dimension of the array using the means for selecting the memory cells, b. and a pair of terminals (BL(i), BLB(i)) of each cell being connected in the circuit to allow a common application, to memory cells of the array selected according to a second dimension of the array, of electrical energy for reading or writing magnetic information in the pillar.The said electrical energy being applied by circulating a current controlled by a current control circuit (111).