SOT MRAM Write Structure Reducing Electrical Resistance

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Solution Overview

Problem

Existing MRAM devices face challenges in reducing overall electrical resistance while maintaining required programming and magnetization performance.

Innovation Solution

The semiconductor device incorporates spin-orbit torque (SOT) patterns and an electrically conductive layer in a write structure, which reduces the overall electrical resistance while maintaining programming and magnetization performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional write structures are used in MRAM devices, then the device structure is simple, but the overall electrical resistance is high which degrades operation performance

Engineering Contradiction:
Improveoperation performanceVSAvoidelectrical resistance
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The write structure employs a composite configuration combining spin-orbit torque (SOT) patterns made of ferromagnetic materials with a separate electrically conductive layer (e.g., copper, aluminum, or tungsten). This composite structure leverages the high spin-orbit coupling of the SOT patterns for magnetization switching while the highly conductive layer provides low-resistance current paths, thereby reducing overall electrical resistance and improving operation performance without sacrificing magnetic functionality.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The write structure is segmented into functionally distinct components: spin-orbit torque patterns responsible for generating magnetic fields through spin Hall effect, and a separate electrically conductive layer responsible for current transport. This segmentation allows each component to be optimized independently - the SOT patterns for magnetization control and the conductive layer for minimizing resistive losses - ultimately resolving the contradiction between performance and energy loss.

Inventive Principle:
Principle #1Segmentation

2Reliability

If the electrical resistance is reduced by adding conductive layers, then the operation performance is improved, but the device complexity increases

Engineering Contradiction:
Improveoperation performanceVSAvoidwrite structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The electrically conductive layer is merged with the existing SOT pattern structure to form an integrated write structure. Rather than adding completely separate components, the conductive layer is positioned to overlap and interact with the SOT patterns, creating a unified structure that performs both magnetization switching and low-resistance current transport functions simultaneously, thus improving performance while limiting complexity increases.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The write structure is designed with multi-functionality where the combined SOT pattern and conductive layer system simultaneously achieves: (1) magnetization switching through spin Hall effect, (2) low-resistance current transport, and (3) programmable magnetic field generation. This multi-functional design allows a single integrated structure to address multiple performance requirements without proportionally increasing device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances the operation performance of the memory cell and semiconductor device, potentially improving power consumption.

Implementation Method 1

Spin-orbit torque (SOT) patterns and an electrically conductive layer are disposed in a write structure for reducing the overall electrical resistance of the write structure while maintaining the required programming performance and magnetization performance

Methodology Applied
Scientific EffectSpin-orbit torque:

Implementation Method 2

The electrically conductive layer covers the spin-orbit torque patterns, and the electrically conductive layer is partly disposed above the spin-orbit torque patterns in a vertical direction and partly disposed between the spin-orbit torque patterns in a first horizontal direction

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 3

During the read operation, the resistance of the MRAM cell is different when the magnetization alignments of the data layer and the reference layer are the same or not

Methodology Applied
Scientific EffectMagnetoresistance: Magnetoresistance

Data Source

PatentUS20250204266A1Semiconductor device and manufacturing method thereof
Publication Date: 2025.06.19 UNITED MICROELECTRONICS CORP
  • US20250204266A1 patent drawing
  • US20250204266A1 patent drawing
  • US20250204266A1 patent drawing

AI summary

A semiconductor device includes a substrate, magnetic tunnel junction (MTJ) structures, and a write structure. The MTJ structures are disposed above the substrate. The write structure is disposed on and connected with the MTJ structures. The write structure includes spin-orbit torque (SOT) patterns and an electrically conductive layer. The SOT patterns are separated from one another, and each of the SOT patterns is disposed on and connected with one of the MTJ structures. The conductive layer covers the SOT patterns. The electrically conductive layer is partly disposed above the SOT patterns in a vertical direction and partly disposed between the SOT patterns in a first horizontal direction.