SOT-MRAM Computing Circuit With Shared Current for XOR/XNOR CIM
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing spin-orbit torque (SOT) magnetic random-access memory (MRAM) technologies for XOR/XNOR computation face challenges with large footprint, high power consumption, complex circuit design, and poor scalability, limiting their application in compute-in-memory (CIM) systems.
Innovation Solution
A novel computing circuit design using SOT-MRAM cells with a shared switching current to store different logic values, featuring a complementary type-XY configuration and mirror-image magnetic tunnel junctions, allowing simultaneous storage of opposite polarities with a single current, reducing footprint and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional SOT-MRAM cells are used for XOR/XNOR computation, then computation functionality is achieved, but footprint area becomes large
Solution Approach 1:
The patent merges two separate SOT-MRAM cells into a single unified cell structure that can perform both XOR and XNOR computations. The combined cell uses shared components including a single reference layer, a single free layer with dual magnetic moments, and shared bit lines, thereby achieving computation functionality while reducing footprint area by approximately 50% compared to conventional separate cell designs.
Solution Approach 2:
The unified SOT-MRAM cell is designed to perform multiple functions: it can execute both XOR and XNOR computations, store multiple bits of information simultaneously, and operate in different computational modes by adjusting current directions and read transistor configurations. This multi-functionality eliminates the need for separate dedicated cells for each operation, significantly reducing the overall footprint area.
2Measurement precision
If separate SOT-MRAM cells are used for different logic values, then computation accuracy is maintained, but power consumption increases
Solution Approach 1:
The patent combines multiple cell functions into a single unified cell that shares critical components such as the reference layer, free layer, and bit lines. By sharing these components, the cell reduces redundant power consumption while maintaining the ability to accurately represent different logic values through controlled magnetic moment orientations and current directions.
Solution Approach 2:
The unified cell structure allows for dynamic switching between different computational states by reversing current directions and magnetic polarities. The same physical infrastructure is reused for both XOR and XNOR operations, effectively 'recovering' the use of existing components rather than requiring separate dedicated structures, thereby reducing overall power consumption.
3Reliability
If traditional MRAM cell designs are used, then reliability is maintained, but circuit complexity increases
Solution Approach 1:
The patent merges multiple traditional MRAM cell functions into a unified structure with shared reference layers, free layers, and bit lines. This consolidation reduces the number of discrete components and interconnections required, thereby reducing circuit complexity while maintaining reliability through proven SOT-MRAM mechanisms for data storage and retrieval.
Solution Approach 2:
The unified cell is designed to perform multiple computational functions (XOR, XNOR, multi-bit storage) using a single standardized structure. This universality simplifies the overall circuit design by eliminating the need for multiple specialized cell types and their associated control logic, reducing circuit complexity while maintaining the reliability of individual function executions.
4Quantity of substance
If conventional memory architectures are used, then data storage capacity is achieved, but data access speed decreases
Solution Approach 1:
The patent merges storage and computation functions into a unified SOT-MRAM cell structure, enabling compute-in-memory operations. By integrating computational logic directly within the memory cell, the system eliminates the need to move data between separate storage and processing units, thereby maintaining high storage capacity while significantly improving data access and processing speed through in-cell computation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables efficient XOR/XNOR computations with lower power consumption and smaller footprint, facilitating faster operations and broader application in CIM systems, particularly in machine learning and business decision-making.
Implementation Method 1
spin-orbit torque (SOT) magnetic random-access memory (MRAM) technologies
Implementation Method 2
a first magnetic polarity of the first magnetic tunnel junction caused by the write current is different from a second magnetic polarity of the second magnetic tunnel junction caused by the write current
Data Source
AI summary
This disclosure provides a computing circuit. The computing circuit includes a first magnetic tunnel junction and a second magnetic tunnel junction. The first magnetic tunnel junction is configured to store a first logic value based on a write current. The second magnetic tunnel junction is configured to store a second logic value based on the write current. The first logic value is different from the second logic value.