Nanostructure Transistor Source/Drain Cavity Contact for Lower Resistance

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Solution Overview

Problem

Nanostructure transistors face fabrication challenges that lead to increased resistance and reduced performance due to decreased contact surface area between the source/drain region and contact, causing current crowding and increased contact resistance.

Innovation Solution

A hollow cavity is formed in the source/drain region, filled with a metal core and recessed within the source/drain region to increase contact surface area, reducing contact resistance and enhancing current flow.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If the contact surface area between source/drain region and contact is decreased, then device size is reduced, but contact resistance increases

Engineering Contradiction:
Improvedevice sizeVSAvoidcontact resistance
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

The patent transitions from a planar contact interface to a three-dimensional recessed contact structure. The contact is formed in a cavity that extends into the source/drain region, creating vertical and lateral contact surfaces. This dimensional change allows the contact to access the source/drain region from multiple directions (top, sidewalls), significantly increasing the effective contact area without increasing the device footprint.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The contact structure is nested within the source/drain region by forming a cavity and filling it with conductive material. The contact is recessed into the source/drain region, creating a nested configuration where the contact resides within the source/drain structure. This nesting approach maximizes the contact interface area within the available vertical space, improving electrical connection without expanding the horizontal device dimensions.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Use of energy by moving object

If current path efficiency is improved, then power efficiency increases, but device complexity increases

Engineering Contradiction:
Improvepower efficiencyVSAvoidfabrication complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The cavity in which the contact is formed is created during the source/drain region formation process, before the contact deposition step. This preliminary creation of the cavity structure allows subsequent contact materials to be deposited directly into the pre-formed recess, establishing an efficient current path early in the fabrication sequence. The preliminary action of cavity formation enables better current flow without requiring complex post-processing steps.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20260113966A1Semiconductor device and methods of formation
Publication Date: 2026.04.23 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20260113966A1 patent drawing
  • US20260113966A1 patent drawing
  • US20260113966A1 patent drawing

AI summary

A source/drain region is formed for a nanostructure transistor of a semiconductor device such that a hollow cavity extends into the source/drain region from a top of the source/drain region into the source/drain region. In some implementations, the cavity extends fully through the depth of the source/drain region. The cavity results from partial epitaxial growth of one or more epitaxial layers of the source/drain region. A metal core of the source/drain region is formed in the cavity and electrically coupled to a source/drain contact of a nanostructure transistor such that electrically conductive material is recessed within the source/drain region. This provides a greater amount of surface area for the source/drain contact to contact the source/drain region than if the source/drain region were fully filled in with epitaxially-grown semiconductor material.