Source/Drain Contact Silicide Layout for Lower Transistor Resistance
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Solution Overview
Problem
Contact resistance between source/drain silicide regions and overlying contact plugs is a significant factor limiting the performance improvement of integrated circuits as they shrink in size.
Innovation Solution
A conformal deposition process is used to form a metal layer in the contact opening, resulting in thicker silicide regions at the corners of the source/drain contact plug, providing a larger landing area and reducing contact resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional deposition processes are used to form metal layers in contact openings, then the manufacturing process is simpler, but the metal layer thickness is non-uniform at corner regions resulting in higher contact resistance
Solution Approach 1:
The patent changes the deposition parameters by using conformal deposition methodology which ensures uniform metal layer thickness across all regions including corners. This parameter change in the deposition process resolves the technical contradiction by achieving both low contact resistance through uniform thickness and maintaining reasonable process complexity
Solution Approach 2:
The patent applies local quality by ensuring that the metal layer has uniformly thick coverage specifically at corner regions where conventional processes fail. This localized improvement in layer quality at critical areas (corners) directly reduces contact resistance without requiring complex process changes elsewhere
2Reliability
If the metal layer thickness is increased to reduce contact resistance, then contact resistance decreases, but the manufacturing precision required to maintain uniform thickness increases
Solution Approach 1:
The patent applies preliminary action by using conformal deposition that pre-establishes uniform metal layer thickness throughout the contact opening before any subsequent processing. This preliminary uniform deposition ensures that corner regions receive adequate metal coverage, reducing contact resistance while maintaining achievable manufacturing precision
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method reduces contact resistance and enhances the performance of transistors by ensuring a uniform thickness of the metal layer, particularly at corner regions, thereby improving the overall efficiency of the integrated circuits.
Implementation Method 1
A conformal deposition process is used to form a metal layer in the contact opening
Implementation Method 2
performing an annealing process to react the metal layer with the source/drain region
Implementation Method 3
performing an annealing process to react the metal layer with the source/drain region, wherein a source/drain silicide region is formed
Data Source
AI summary
A method includes forming a gate stack, growing a source/drain region on a side of the gate stack through epitaxy, depositing a contact etch stop layer (CESL) over the source/drain region, depositing an inter-layer dielectric over the CESL, etching the inter-layer dielectric and the CESL to form a contact opening, and etching the source/drain region so that the contact opening extends into the source/drain region. The method further includes depositing a metal layer extending into the contact opening. Horizontal portions, vertical portions, and corner portions of the metal layer have a substantially uniform thickness. An annealing process is performed to react the metal layer with the source/drain region to form a source/drain silicide region. The contact opening is filled to form a source/drain contact plug.