Source/Drain Contact Openings Using a Sacrificial Cut Mask

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Solution Overview

Problem

As semiconductor devices continue to shrink in feature size, the integration density of electronic components increases, but this leads to challenges in forming smaller cuts and contact openings between source/drain contacts, which can result in bridging or shorting issues and affect contact resistance and device performance.

Innovation Solution

The use of a sacrificial material to form a patterned cut mask allows for smaller cuts and improved filling of source/drain contacts, with a hard mask and patterned cut mask used as an etching mask to create contact openings that are narrower near the bottom, reducing the risk of bridging and improving contact resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If minimum feature sizes are reduced to increase integration density, then more components can be integrated into a given area, but manufacturing precision and reliability of forming smaller features deteriorate

Engineering Contradiction:
Improveintegration densityVSAvoidfeature formation precision
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The patent segments the contact formation process into multiple steps: first forming a hard mask with initial openings, then using sacrificial material to create finer pitch patterns, and finally transferring the pattern. This multi-stage segmentation allows each step to optimize for its specific requirement, achieving overall finer feature sizes while maintaining manufacturing precision.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary actions by first forming the hard mask layer and initial openings before introducing sacrificial material. This preliminary structure provides a foundation that enables subsequent finer patterning, allowing the process to achieve smaller features while controlling manufacturing precision through staged development.

Inventive Principle:
Principle #10Preliminary action

2Ease of manufacture

If conventional direct patterning is used for contact openings, then the process is simpler, but smaller and more precise features cannot be formed

Engineering Contradiction:
Improvepatterning process simplicityVSAvoidcontact opening precision
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent introduces sacrificial material as an intermediary between the hard mask and the final contact opening formation. This intermediary enables the transfer of fine pitch patterns that would be difficult to achieve directly, improving contact opening precision while adding manageable process steps rather than attempting complex direct patterning.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent adds a temporal dimension to the patterning process by using sequential steps with sacrificial material that can be deposited, patterned, and removed. This multi-dimensional approach to pattern formation enables finer precision than single-step direct patterning while keeping each individual step relatively simple.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS20230352344A1Semiconductor Device and Method
Publication Date: 2023.11.02 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20230352344A1 patent drawing
  • US20230352344A1 patent drawing
  • US20230352344A1 patent drawing

AI summary

A method includes forming a first inter-layer dielectric (ILD) layer over source and drain regions of a semiconductor structure; forming a first mask material over the first ILD layer; etching first openings in the first mask material; filling the first openings with a fill material; etching second openings in the fill material; filling the second openings with a second mask material; removing the fill material; and etching the first ILD layer using the first mask material and the second mask material as an etching mask to form openings in the first ILD layer that expose portions of the source and drain regions of the semiconductor structure.