Source/Drain Contact Structure With Expanded Epi Shoulder Area

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Solution Overview

Problem

The challenge in integrated circuit fabrication lies in achieving enhanced contact area for source or drain contacts in multi-gate and nanowire transistors, particularly at the sub-10 nanometer node, where conventional methods face limitations in scaling and lithographic processes, leading to trade-offs between feature dimension and spacing, and increased capacitance.

Innovation Solution

The implementation of a sacrificial protection layer on the gate insulating cap/plug/sidewall, using a carbon-based hardmask to recess and expose epitaxial structures for isotropic etching, which increases the contact area by opening the Epi shoulder for silicidation and reduces capacitance, while protecting nearby features during the etching process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of moving object

If conventional lithographic processes are used to pattern features at sub-10 nanometer node, then feature dimension can be reduced, but spacing between features increases leading to increased capacitance

Engineering Contradiction:
Improvefeature dimensionVSAvoidcapacitance
Core Design Contradiction:
Length of moving objectVSObject-generated harmful factors

Solution Approach 1:

The patent introduces a vertical dimension by forming an etch stop layer at a depth below the surface (e.g., 5-20 nm deep) and creating openings through this layer. This vertical etch stop structure allows lateral feature spacing to be increased (reducing capacitance) while maintaining small effective feature dimensions through the vertical etch stop mechanism, thus resolving the contradiction between feature size and spacing.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Area of stationary object

If contact area for source or drain contacts is increased, then device performance improves, but lithographic process constraints make it difficult to achieve both small critical dimension and large contact area

Engineering Contradiction:
Improvecontact areaVSAvoidcritical dimension
Core Design Contradiction:
Area of stationary objectVSManufacturing precision

Solution Approach 1:

The patent segments the contact structure into multiple components: a shallow opening through the dielectric layer, an etch stop layer with controlled depth, and a deeper contact region. This segmentation allows the contact area to be expanded vertically through the etch stop layer while maintaining precise lateral critical dimensions at the surface level, enabling both large contact area and small critical dimension.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent utilizes the vertical dimension by forming the etch stop layer at a specific depth below the surface and creating angled or vertical openings through this layer. This allows the contact area to be increased in the vertical dimension while keeping the lateral critical dimension small, effectively resolving the contradiction between contact area and critical dimension.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Productivity

If aggressive scaling is performed to increase device density, then capacity increases, but maintaining mobility improvement and short channel control becomes challenging

Engineering Contradiction:
Improvedevice densityVSAvoidshort channel control
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent performs preliminary action by forming the etch stop layer and configuring the contact structure before final device operation. The etch stop layer is pre-formed at a specific depth with controlled thickness and material composition, which establishes the geometric configuration needed for maintaining short channel control and mobility improvement even as devices are aggressively scaled for higher density.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20240178273A1Integrated circuit structures with source or drain contacts having enhanced contact area
Publication Date: 2024.05.30 INTEL CORP
  • US20240178273A1 patent drawing
  • US20240178273A1 patent drawing
  • US20240178273A1 patent drawing

AI summary

Integrated circuit structures having source or drain contacts with enhanced contact area, and methods of fabricating integrated circuit structures having source or drain contacts with enhanced contact area, are described. For example, an integrated circuit structure includes a plurality of horizontally stacked nanowires. A gate structure is over the plurality of horizontally stacked nanowires. An epitaxial source or drain structure is at an end of the plurality of horizontally stacked nanowires. A conductive contact structure is vertically over the epitaxial source or drain structure. The conductive contact structure has a lower portion extending over the top and along upper portions of sides of the epitaxial source or drain structure, and has an upper portion on the lower portion. The upper portion has a maximum lateral width less than a maximum lateral width of the lower portion.