Source/Drain Epitaxial Ge Layering to Suppress Dislocations and Voids
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Solution Overview
Problem
The increasing demand for high-performance semiconductor devices with higher integration levels poses challenges in maintaining electrical characteristics and reliability due to defects in the source/drain regions, such as dislocations and voids, which affect the compressive stress applied to channel layers, leading to increased resistance and performance deterioration.
Innovation Solution
A semiconductor device design featuring a source/drain region with sequentially stacked epitaxial layers of varying germanium concentrations, including a sixth epitaxial layer that fills the gap and reduces the aspect ratio, thereby suppressing dislocations and voids, and includes a gate structure that surrounds channel layers to enhance electrical performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the degree of integration is increased to meet high-performance demands, then device functionality and speed are improved, but defects such as dislocations and voids in source/drain regions increase, leading to reliability deterioration
Solution Approach 1:
The source/drain region is segmented into multiple epitaxial layers (first through sixth epitaxial layers) with alternating germanium concentrations. This segmentation allows each layer to serve specific functions: high-Ge layers provide compressive stress while low-Ge layers reduce defect formation, collectively improving reliability without sacrificing speed
Solution Approach 2:
Different regions of the source/drain structure are assigned different germanium concentrations tailored to local requirements. The high-Ge layers (second, fourth, sixth) are positioned where compressive stress is needed to enhance carrier mobility, while low-Ge layers (first, third, fifth) are positioned where defect suppression is critical, achieving both speed and reliability improvements
2Speed
If compressive stress is applied to channel layers to enhance charge mobility, then device speed is improved, but defects such as dislocations and voids form in source/drain regions, causing reliability issues
Solution Approach 1:
The source/drain region is divided into multiple epitaxial layers with alternating germanium concentrations. High-Ge layers (second, fourth, sixth) provide the necessary compressive stress to enhance charge mobility in the channel, while low-Ge layers (first, third, fifth) act as buffer zones that suppress dislocation and void formation, allowing stress application without reliability penalties
Solution Approach 2:
The germanium concentration parameter is dynamically changed across different epitaxial layers. By alternating between high and low Ge concentrations, the structure optimizes the balance between generating compressive stress (high Ge) and suppressing defects (low Ge), thereby maintaining both high charge mobility and source/drain region reliability
3Reliability
If the aspect ratio of source/drain regions is reduced to suppress dislocations and voids, then reliability is improved, but the structural complexity and manufacturing difficulty increase
Solution Approach 1:
The source/drain region is segmented into six epitaxial layers with alternating germanium concentrations. This segmentation enables the structure to achieve an optimized aspect ratio that suppresses dislocations and voids, while the systematic alternation of layers provides a manageable manufacturing approach despite the increased complexity
Solution Approach 2:
By changing the germanium concentration parameter across six layers, the invention achieves an optimal aspect ratio configuration that suppresses defects. The alternating pattern provides a regular structure that, while more complex than single-layer designs, follows a predictable manufacturing sequence that mitigates the complexity burden
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design improves the electrical characteristics and reliability of semiconductor devices by reducing defects in the source/drain region, maintaining sufficient compressive stress on channel layers, and enhancing charge mobility, thus addressing the limitations of existing technologies.
Implementation Method 1
maintaining sufficient compressive stress on channel layers
Implementation Method 2
epitaxial layers of varying germanium concentrations... maintaining sufficient compressive stress on channel layers
Implementation Method 3
suppressing dislocations and voids
Implementation Method 4
sequentially stacked epitaxial layers of varying germanium concentrations... suppressing dislocations and voids
Implementation Method 5
a sixth epitaxial layer that fills the gap and reduces the aspect ratio
Implementation Method 6
a sixth epitaxial layer that fills the gap
Data Source
AI summary
Semiconductor device may include an active region extending in a first direction, channel layers spaced apart from each other in a vertical direction, a gate structure extending on the active region and the channel layers to surround the channel layers and extending in a second direction, and a source/drain region on the active region adjacent to a side of the gate structure and contacting the plurality of channel layers. The source/drain region includes first to sixth epitaxial layers that are sequentially stacked in the vertical direction and have respective first to sixth germanium (Ge) concentrations. The first Ge concentration is lower than the second Ge concentration, the third Ge concentration is lower than the second Ge concentration and the fourth Ge concentration, and the fifth Ge concentration is lower than the fourth Ge concentration and the sixth Ge concentration.