Source/Drain Epitaxial Recess Control in FinFET Contact Formation

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Solution Overview

Problem

The semiconductor industry faces challenges in manufacturing three-dimensional designs such as FinFETs and GAA FETs due to issues in gate electrode formation and source/drain region definition, particularly in achieving precise control over the recessing of epitaxial layers for optimal device performance and reliability.

Innovation Solution

A method involving the formation of n-type and p-type source/drain epitaxial layers with different recessing amounts, using plasma etching with sulfur-containing gases to create a height difference, and forming source/drain contacts with specific geometries to improve device performance and reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional gate electrode formation and source/drain region definition methods are used, then manufacturing process simplicity is maintained, but manufacturing precision and device performance are insufficient

Engineering Contradiction:

Improverecessing precision of epitaxial layersVSAvoidcomplexity of gate electrode formation and source/drain definition

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent segments the source/drain epitaxial layers into n-type and p-type regions with different recessing amounts, allowing independent control of each region's depth. This segmentation enables precise control over carrier diffusion and electrical characteristics without requiring complex overall process redesign

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by creating different recessing depths for n-type and p-type source/drain epitaxial layers. Each region is optimized locally with specific recessing amounts tailored to its electrical requirements, improving overall device performance through localized precision rather than uniform treatment

Inventive Principle:

Principle #3Local quality

2Reliability

If uniform recessing is applied to all source/drain epitaxial layers, then manufacturing complexity is reduced, but device performance and reliability are compromised

Engineering Contradiction:

Improvedevice reliabilityVSAvoidease of epitaxial layer recessing

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The patent changes the recessing parameter (etch depth) differently for n-type and p-type source/drain epitaxial layers. By adjusting the recessing amount as a variable parameter for each region, the patent optimizes carrier diffusion and electrical characteristics, thereby improving device reliability while maintaining manufacturing feasibility through controlled parameter variation

Inventive Principle:

Principle #35Parameter changes

3Manufacturing precision

If precise control over epitaxial layer recessing is achieved, then device performance is improved, but manufacturing complexity increases

Engineering Contradiction:

Improvecontrol precision of epitaxial layer recessingVSAvoidcomplexity of plasma etching process

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent utilizes parameter changes in plasma etching by introducing sulfur-containing gases to selectively modify etching rates for different epitaxial layer types. This allows precise control over recessing depths of n-type and p-type layers through chemical parameter adjustment rather than complex physical process control

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent replaces purely mechanical/physical etching control with chemical enhancement using sulfur-containing gases. This substitution enables more precise and selective etching of different epitaxial layers by leveraging chemical reactivity differences, reducing the need for complex mechanical process control while achieving superior precision

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the performance and reliability of FinFETs by optimizing the recessing of epitaxial layers and contact formation, leading to improved device characteristics and manufacturing efficiency.

Implementation Method 1

the n-type source/drain epitaxial layer and the p-type source/drain epitaxial layer respectively recessed

Methodology Applied

Scientific EffectPlasma etching: Plasma

Implementation Method 2

using plasma etching with sulfur-containing gases to create a height difference

Methodology Applied

Scientific EffectChemical etching with sulfur-containing gases:

Data Source

PatentUS20240170339A1Method of manufacturing a semiconductor device and a semiconductor device

Publication Date: 2024.05.23 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

In a method of manufacturing a semiconductor device, an n-type source/drain epitaxial layer and a p-type source/drain epitaxial layer respectively formed, a dielectric layer is formed over the n-type source/drain epitaxial layer and the p-type source/drain epitaxial layer, a first opening is formed in the dielectric layer to expose a part of the n-type source/drain epitaxial layer and a second opening is formed in the dielectric layer to expose a part of the p-type source/drain epitaxial layer, and the n-type source/drain epitaxial layer and the p-type source/drain epitaxial layer respectively recessed. A recessing amount of the n-type source/drain epitaxial layer is different from a recessing amount of the p-type source/drain epitaxial layer.