Dual-Side Source/Drain Contact Structure for Lower Schottky Resistance

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Solution Overview

Problem

The semiconductor industry faces challenges in reducing contact resistance between source/drain regions and contact structures in semiconductor devices, which hinders performance improvements due to increased complexity in manufacturing processes as devices scale down.

Innovation Solution

The implementation of dual side contact structures with epitaxial source/drain regions and gate structures on fin structures, using n-type and p-type work function metal silicide layers to reduce Schottky barrier heights, thereby forming arrays of NFET and PFET with reduced contact resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of moving object

If conventional contact structures are used in scaled-down semiconductor devices, then device dimensions are reduced, but contact resistance increases and manufacturing complexity increases

Engineering Contradiction:
Improvedevice dimensionsVSAvoidcontact resistance
Core Design Contradiction:
Length of moving objectVSReliability

Solution Approach 1:

The contact structure is divided into multiple segments: a first contact structure formed on a first surface of the source/drain region, and a second contact structure formed on a second surface (side surface) of the source/drain region. This segmentation allows each contact structure to serve specific functions and reduces overall contact resistance by providing multiple conduction paths.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention transitions from conventional single-surface contact structures to dual-surface contact structures by utilizing the side surface (second surface) of the source/drain region in addition to the top surface (first surface). This dimensional expansion creates additional contact areas and conduction paths, effectively reducing contact resistance in scaled-down devices.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If device dimensions are scaled down to increase storage capacity and processing speed, then higher performance is achieved, but manufacturing process complexity increases

Engineering Contradiction:
Improveprocessing speedVSAvoidmanufacturing process complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The first contact structure is formed on the first surface of the source/drain region before the gate structure is formed. This preliminary action simplifies the overall manufacturing process by establishing contact structures early in the fabrication sequence, avoiding the need for complex subsequent steps to create contacts through or around the gate structure.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Different contact structures are formed on different surfaces of the source/drain region with potentially different materials and properties optimized for their specific locations and functions. The first contact structure on the top surface and the second contact structure on the side surface can be tailored to their respective electrical and mechanical requirements.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces contact resistance by 50% to 70%, enhancing the performance of semiconductor devices by improving electrical conduction between source/drain regions and contact structures.

Implementation Method 1

using n-type and p-type work function metal silicide layers to reduce Schottky barrier heights, thereby forming arrays of NFET and PFET with reduced contact resistance

Methodology Applied
Scientific EffectSchottky barrier height reduction: Electrical Resistance

Data Source

PatentUS11955515B2Dual side contact structures in semiconductor devices
Publication Date: 2024.04.09 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11955515B2 patent drawing
  • US11955515B2 patent drawing
  • US11955515B2 patent drawing

AI summary

A semiconductor device with dual side source/drain (S/D) contact structures and a method of fabricating the same are disclosed. The method includes forming a fin structure on a substrate, forming a superlattice structure on the fin structure, forming first and second S/D regions within the superlattice structure, forming a gate structure between the first and second S/D regions, forming first and second contact structures on first surfaces of the first and second S/D regions, and forming a third contact structure, on a second surface of the first S/D region, with a work function metal (WFM) silicide layer and a dual metal liner. The second surface is opposite to the first surface of the first S/D region and the WFM silicide layer has a work function value closer to a conduction band energy than a valence band energy of a material of the first S/D region.