Source Drain Trench Control via Sacrificial Mandrel Etching
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Solution Overview
Problem
The semiconductor industry faces challenges in scaling down integrated circuit devices while maintaining device performance, particularly in forming MOSFETs with strained source and drain features, as existing techniques struggle to achieve precise control over critical dimensions and etching rates during the manufacturing process.
Innovation Solution
A method for fabricating integrated circuit devices involves a series of doping and annealing processes to form doped regions with specific profiles, followed by etching and epitaxial growth to create source and drain features, allowing for improved control over recess and trench shapes and dimensions, thereby enhancing device performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If existing techniques are used to form MOSFETs with strained source and drain features, then device performance can be enhanced, but precise control over critical dimensions and etching rates becomes difficult
Solution Approach 1:
The patent applies preliminary action by forming sacrificial mandrels and performing doping/annealing processes before the actual etching of source/drain regions. This sequence allows the critical dimensions to be defined by the mandrel geometry and doping profiles rather than direct etching control, thereby achieving precise dimensional control while still enabling strained source/drain formation for device performance enhancement
Solution Approach 2:
The patent introduces sacrificial mandrels as intermediary structures that mediate between the patterning process and the final source/drain formation. These mandrels serve as templates that define critical dimensions, allowing precise control to be achieved through mandrel fabrication rather than direct etching, while the subsequent etching process can proceed with less stringent control requirements
2Reliability
If existing techniques are used to form MOSFETs with strained source and drain features, then device performance can be enhanced, but control over etching rates becomes difficult
Solution Approach 1:
The patent performs doping and annealing of sacrificial mandrels before etching, creating differential etch selectivity between the mandrel material and the surrounding structures. This preliminary treatment establishes controlled etching behavior that enables precise etching rate control during the source/drain formation process, while still allowing strained source/drain features to be formed for enhanced device performance
3Manufacturing precision
If photoresist and hard mask features are used in the manufacturing process, then precise patterning can be achieved, but manufacturing complexity and costs increase
Solution Approach 1:
The patent extracts and eliminates the photoresist and hard mask layers from the manufacturing process by using sacrificial mandrels that can be directly formed and patterned without requiring these additional masking layers. The mandrels themselves serve as the patterning elements, and their removal after serving their templating function simplifies the overall process by removing unnecessary manufacturing steps and materials
Solution Approach 2:
The sacrificial mandrels perform multiple functions: they define critical dimensions, serve as templates for doping and annealing, control etching rates through their material properties, and ultimately are removed to leave the final pattern. This multi-functionality replaces what would otherwise require separate photoresist and hard mask layers, reducing manufacturing complexity while maintaining patterning precision
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in improved device performance by enabling precise control over critical dimensions and simplifying the manufacturing process, reducing costs by potentially omitting photoresist and hard mask features, and enhancing the overall efficiency of integrated circuit production.
Implementation Method 1
a first doping process is provided to introduce a first dopant into first doped regions of the substrate
Implementation Method 2
a first anneal process is provided to activate the first dopant in the first doped regions
Implementation Method 3
a first anneal process is provided to activate the first dopant in the first doped regions
Implementation Method 4
etched to form trenches
Implementation Method 5
epitaxial (epi) semiconductor materials to enhance carrier mobility and improve device performance
Data Source
AI summary
An integrated circuit device and method for manufacturing the integrated circuit device provide improved control over a shape of a trench for forming the source and drain features of integrated circuit device, by forming a second doped region in a first doped region and removing the first and the second doped regions by a first and a second wet etching processes.


