Source Gate Isolation for NAND Read Disturb Mitigation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Charge storage devices in NAND memory devices experience read disturb stress during read operations, where unintended programming of adjacent charge storage devices can occur due to electrical conduction.

Innovation Solution

The solution involves turning on the source gate at 5 volts to electrically isolate non-selected pillars from the silicon well, preventing conduction and thus reducing read disturb stress.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If read operations are performed on charge storage devices, then data can be retrieved, but read disturb stress causes unintended programming of adjacent charge storage devices due to electrical conduction

Engineering Contradiction:
Improvedata retrieval reliabilityVSAvoidread disturb stress
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

A source gate is introduced as an intermediary element between the common source line and the charge storage devices. This source gate acts as a mediator that controls electrical conduction to and from the silicon well, preventing harmful read disturb stress from affecting non-selected charge storage devices while allowing legitimate read operations on selected devices.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The source connection is segmented into two distinct parts: a common source line that serves multiple charge storage devices, and a source gate that provides individual control over electrical conduction to each device. This segmentation allows selective isolation of non-selected devices during read operations, preventing read disturb while maintaining efficient common source line architecture.

Inventive Principle:
Principle #1Segmentation

2Ease of operation

If electrical conduction is maintained during read operations, then charge storage devices can be accessed, but unintended programming occurs in non-selected devices

Engineering Contradiction:
Improvedevice accessibilityVSAvoidunintended programming
Core Design Contradiction:
Ease of operationVSObject-generated harmful factors

Solution Approach 1:

The source gate introduces dynamic control over electrical conduction during read operations. By adjusting the voltage state of the source gate, the system can dynamically switch between conducting and blocking states, enabling selective access to charge storage devices while preventing unintended programming of non-selected devices.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

Different electrical conduction conditions are applied to different charge storage devices during read operations. Selected devices maintain electrical conduction for normal operation, while non-selected devices have conduction blocked by the source gate, preventing read disturb stress. This local differentiation of electrical properties solves the contradiction between accessibility and harm prevention.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively reduces read disturb stress by preventing unintended programming of non-selected charge storage devices during read operations.

Implementation Method 1

turning on the source gate at 5 volts to electrically isolate non-selected pillars from the silicon well, preventing conduction

Methodology Applied
Scientific EffectElectrical conduction control: Conduction (electrical)

Data Source

PatentUS20250124982A1Apparatus and methods including source gates
Publication Date: 2025.04.17 MICRON TECHNOLOGY INC
  • US20250124982A1 patent drawing
  • US20250124982A1 patent drawing
  • US20250124982A1 patent drawing

AI summary

Apparatus and methods are disclosed, such as an apparatus that includes a string of charge storage devices associated with a pillar (e.g., of semiconductor material), a source gate device, and a source select device coupled between the source gate device and the string. Additional apparatus and methods are described.