Nonvolatile Storage Device Source Line Segmentation Leakage Control
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Solution Overview
Problem
In three-dimensional memory devices, leakage current flows through unselected memory cells due to the shared connection of source and bit lines, leading to inefficiencies and potential data read errors.
Innovation Solution
The implementation of a nonvolatile storage device with a memory cell array that includes a bit line, a source line, and a first source selector switch, where the source line is connected to a source bias line only for the selected memory cell, thereby isolating unselected memory cells and minimizing leakage current by controlling the number of source lines connected to the bias line.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If source lines are commonly connected to ground potential for all memory layers, then the structure is simple and easy to manufacture, but leakage current flows through unselected memory cells
Solution Approach 1:
The patent divides the source line system into multiple independently controllable source lines (S1A, S2A, S1B, S2B, etc.), each capable of being selectively connected to ground or floating based on the selected memory cell. This segmentation allows precise control of bias voltages to prevent leakage current in unselected cells while maintaining manufacturing simplicity.
Solution Approach 2:
The patent implements dynamic control of source line connections through selector switches (41A, 42A, 41B, 42B) that can change the connection state of each source line between ground and floating based on the selected memory cell. This dynamic adjustment eliminates leakage current in unselected cells while keeping the structure manufacturable.
2Adaptability or versatility
If multiple source lines are connected to source bias line, then more memory cells can be accessed, but the number of bias lines increases leading to higher complexity
Solution Approach 1:
The patent merges multiple source lines (S1A and S2A, or S1B and S2B) to share a common source bias line (SB1 or SB2) through selector switches. This merging allows multiple memory cells to be accessed while reducing the total number of bias lines needed, thereby decreasing device complexity.
Solution Approach 2:
The patent introduces selector switches (41A, 42A, 41B, 42B) as intermediary components between source lines and bias lines. These switches act as mediators that enable multiple source lines to share common bias lines while maintaining independent control capability, thus reducing bias line count without sacrificing accessibility.
3Object-generated harmful factors
If source lines are kept floating for unselected memory layers, then leakage current is reduced, but the control mechanism becomes more complex
Solution Approach 1:
The patent segments the bias control mechanism into individual selector switches for each source line, allowing independent control of floating or ground connection for each line. This segmented approach suppresses leakage current in unselected cells while keeping the control mechanism manageable through modular design.
Solution Approach 2:
The selector switches automatically adjust the connection state of each source line based on the selected memory cell, making the system self-regulating. When a memory cell is selected, its source line is connected to ground; when unselected, it is kept floating. This self-service mechanism reduces leakage without requiring complex external control.
Data Source
AI summary
A nonvolatile storage device having a memory cell array composed of a plurality of memory cells. The plurality of memory cells include a bit line to which the drain terminals of the plurality of memory cells that have noncovalent connected gate terminals are commonly connected and a source line to which the source terminals of the plurality of memory cells that have commonly connected gate terminals are commonly connected and which extend perpendicularly to the bit line. The memory cell also includes a first source selector switch for connecting the source line to a source bias line.