Spacer Member Prevents Void Formation in Semiconductor Encapsulation
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Solution Overview
Problem
The mold array process (MAP) method struggles to effectively encapsulate semiconductor devices with both semiconductor chips and passive elements due to voids forming between the passive elements and the wiring board, caused by the passive elements sinking due to solder surface tension and weight, which hinders the flow of encapsulation resin and degrades the reliability of the semiconductor device.
Innovation Solution
Incorporating spacer members, such as wire bumps or additional protective layers, to maintain a predetermined distance between the passive elements and the wiring board, allowing for easy resin flow and preventing voids, while ensuring reliable electrical connections and encapsulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the MAP method is used to encapsulate semiconductor devices with passive elements, then collective encapsulation of multiple components is achieved, but voids form between passive elements and wiring board due to solder surface tension causing elements to sink
Solution Approach 1:
A spacer member is introduced as an intermediary component between the passive element and the wiring board. This spacer prevents the passive element from sinking into the encapsulation resin by maintaining a predetermined distance, thereby eliminating voids while allowing collective encapsulation to proceed efficiently
Solution Approach 2:
The spacer member is positioned on the wiring board before the passive element is mounted. This preliminary placement ensures that when the passive element is subsequently attached and the encapsulation resin is injected, the element maintains the correct distance from the board, preventing void formation from the outset
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enhances the reliability of semiconductor devices by preventing voids and ensuring proper encapsulation, supporting the implementation of System In Package (SIP) devices with higher functionality and improved reliability.
Implementation Method 1
the passive element goes down toward the wiring board due to surface tension of the solder and weight of the passive element
Data Source
AI summary
A device includes a wiring board, an element mounted on the wiring board, a spacer member intervening between the wiring board and the element to form a space therebetween, and an encapsulation body filling the space and encapsulating the element on the wiring board.