SPAD Photodiode Gate Structure for False Trigger Suppression
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Solution Overview
Problem
Existing SPAD photodiodes suffer from false detections due to parasitic charge triggering, which affects their accuracy in single photon detection.
Innovation Solution
A SPAD photodiode design with a gate electrically insulated from the substrate, featuring a bias voltage application method that adjusts between avalanche and non-avalanche phases, and specific doping levels and region configurations to control minority charge carriers, reducing false detections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a high electric field is applied to enable avalanche detection of single photons, then detection sensitivity is improved, but false detections increase due to parasitic charge triggering
Solution Approach 1:
The substrate is divided into a first portion containing the depletion area and a second portion separated by the gate. This segmentation isolates the high electric field region from parasitic charge generation areas, allowing sensitive photon detection while reducing false detections from parasitic charges in the second portion.
Solution Approach 2:
The gate structure acts as an intermediary element between the first and second portions of the substrate. By applying a repelling potential to the gate during the first phase, minority charge carriers are prevented from reaching the depletion area, thereby blocking parasitic charge triggering while maintaining avalanche detection capability.
2Measurement precision
If the substrate doping level is reduced to improve charge collection efficiency, then detection accuracy is improved, but device stability deteriorates
Solution Approach 1:
Different regions of the substrate are assigned different doping levels to optimize local functions. The first portion has low doping (≤5×10^14 atoms/cm³) for efficient charge collection and high detection accuracy, while the second portion has higher doping for stability and reduced parasitic generation, with the gate controlling carrier flow between regions.
3Reliability
If a gate structure is added to control charge carriers and reduce false detections, then false detection rate is reduced, but device complexity increases
Solution Approach 1:
The gate extends vertically into the substrate from the upper surface, utilizing the depth dimension to separate charge carrier paths. This vertical extension allows the gate to control minority charge carriers in the second portion without requiring additional lateral structures, thereby suppressing false detections with minimal added complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design significantly reduces false detections by confining the electric field and optimizing charge collection, enhancing the photodiode's ability to accurately detect single photons.
Implementation Method 1
application of a potential to the gate at a third value adapted to repelling the minority free charge carriers of the substrate during the first phase and at a fourth value adapted to attracting the minority free charge carriers of the substrate during part of the second phase
Implementation Method 2
SPAD photodiodes are essentially formed by a PN junction reverse biased at a voltage greater than its avalanche threshold... if the displacement speed of this charge in the depletion area is sufficiently high, that is, if the electric field in the depletion area is sufficiently intense, the photodiode is capable of avalanching
Implementation Method 3
When a photogenerated electric charge is injected into the depletion area... A single photon is thus capable of generating a measurable electric signal
Data Source
AI summary
A SPAD-type photodiode comprising a depletion area in a first portion of a semiconductor substrate of a first conductivity type and further comprising a gate electrically-insulated from the substrate, extending into the substrate from an upper surface of the substrate, and separating the first portion of the substrate from a second portion. The photodiode further comprises a first region of the second conductivity type extending from the upper surface of the substrate into the second portion.


