SPAD Pixel Circuit Layout Using Mixed-Voltage Transistors
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Solution Overview
Problem
The challenge is to reduce the area of the pixel circuit in photoelectric conversion devices while maintaining high performance and functionality, particularly in SPAD image sensors where the number of elements per pixel is higher than in CMOS image sensors, which affects the miniaturization and aperture ratio.
Innovation Solution
The solution involves a photoelectric conversion device with a pixel circuit that includes a high withstand voltage transistor and a low withstand voltage transistor, where the signal processing circuit is designed with a thicker gate insulating film for the high withstand voltage transistor and a thinner film for the low withstand voltage transistor, optimizing the layout to minimize circuit area and improve efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the number of elements per pixel is increased to achieve high performance in SPAD image sensors, then the detection capability is improved, but the pixel circuit area increases
Solution Approach 1:
The patent applies local quality by differentiating transistor withstand voltage specifications based on their functional requirements within the pixel circuit. High withstand voltage transistors (e.g., 24V) are used for elements handling avalanche multiplication signals, while low withstand voltage transistors (e.g., 3.3V) are used for logic control elements. This localized optimization allows each element to be sized appropriately for its specific voltage requirements, reducing the overall pixel circuit area while maintaining detection capability.
Solution Approach 2:
The patent changes the voltage parameter specification of transistors based on their position and function in the circuit. By selecting transistors with different withstand voltage ratings (24V vs 3.3V), the design optimizes the area of each transistor element. Low withstand voltage transistors have smaller gate areas, reducing the overall pixel circuit footprint, while high withstand voltage transistors are used only where necessary for avalanche signal handling.
2Reliability
If high withstand voltage transistors are used throughout the pixel circuit to handle avalanche signals, then signal integrity is maintained, but the circuit area increases
Solution Approach 1:
The patent implements local quality by restricting high withstand voltage transistors to only those elements that directly handle avalanche multiplication signals (such as the first transistor in the photoelectric conversion unit). All other logic control elements use low withstand voltage transistors, optimizing area while maintaining signal integrity where critical.
Solution Approach 2:
The patent segments the pixel circuit into two functional zones: a high-voltage zone for avalanche signal handling and a low-voltage zone for logic control. This segmentation allows independent optimization of each zone, with high withstand voltage transistors used only in the high-voltage zone and low withstand voltage transistors in the low-voltage zone, reducing overall area while preserving signal integrity.
3Strength
If the gate insulating film thickness is increased for high withstand voltage transistors, then breakdown voltage is achieved, but the manufacturing complexity increases
Solution Approach 1:
The patent applies local quality by forming gate insulating films with different thicknesses in different regions of the pixel circuit. Thicker gate insulating films (e.g., 5nm-10nm) are formed only in regions requiring high withstand voltage, while thinner films (e.g., 2nm-5nm) are used in low-voltage regions. This localized differentiation achieves the required breakdown voltage where needed while simplifying manufacturing compared to uniformly thick films.
Solution Approach 2:
The patent segments the gate insulating film formation process into distinct thickness zones corresponding to high-voltage and low-voltage transistor regions. This segmentation allows the use of standard thin-film deposition techniques for low-voltage regions while applying thicker films only where high breakdown voltage is required, reducing overall manufacturing complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the area efficiency of the pixel circuit, allowing for a more compact design while maintaining high performance and functionality, particularly in SPAD image sensors, by effectively managing the spacing between elements and reducing interference.
Implementation Method 1
an avalanche diode that multiplies charge generated by an incident of photon by avalanche multiplication
Implementation Method 2
converting the current generated by the avalanche multiplication phenomenon into a pulse signal
Data Source
AI summary
The photoelectric conversion device includes a pixel. The pixel includes a photoelectric conversion unit and a signal processing circuit. The photoelectric conversion unit includes an avalanche diode that multiplies charge generated by an incident of photon by avalanche multiplication, and outputting a first signal in accordance with the incident of photon. The signal processing circuit includes a logic circuit that outputs a third signal in response to the first signal and a second signal. The signal processing circuit includes a first element having a first withstand voltage and a second element having a second withstand voltage lower than the first withstand voltage, and is configured such that the first signal is input to the first element and the second signal is input to the second element.