SPAD Pixel Layout for Higher Withstand Voltage at Smaller Size
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Solution Overview
Problem
Conventional distance measurement systems using single photon avalanche diodes (SPADs) face limitations in miniaturizing pixels while maintaining a desired withstand voltage, as the voltage decreases with pixel size reduction.
Innovation Solution
A light receiving element and photodetector design featuring a semiconductor substrate with a pixel isolation wall, including a photoelectric conversion unit, multiplication region, cathode unit, hole accumulation region, and anode unit, where the multiplication region is positioned asymmetrically to alleviate electric field concentration, allowing for further miniaturization while maintaining adequate voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If pixel size is reduced to enable miniaturization, then the number of pixels per unit area increases, but the withstand voltage decreases
Solution Approach 1:
The multiplication region is positioned asymmetrically within the pixel, specifically closer to the center of the pixel group than the center of the individual pixel. This asymmetric positioning allows the multiplication region to be farther from the anode unit, increasing the distance between opposite polarity electrodes and thereby maintaining higher withstand voltage even as pixel size is reduced.
Solution Approach 2:
The patent addresses the two-dimensional constraint of pixel size by introducing a strategic spatial dimension consideration - the relative positioning of the multiplication region with respect to both the pixel center and pixel group center. This dimensional repositioning allows optimization of electrode spacing without increasing pixel footprint area.
2Productivity
If pixel size is reduced, then integration density increases, but electric field concentration increases causing voltage breakdown
Solution Approach 1:
By positioning the multiplication region asymmetrically (closer to pixel group center than pixel center), the design creates non-uniform electric field distribution that avoids concentration at critical interfaces. The increased distance between multiplication region and anode unit reduces peak electric field strength, preventing voltage breakdown while maintaining high integration density.
3Measurement precision
If multiplication region size is increased to improve sensitivity, then photon detection efficiency improves, but pixel area increases
Solution Approach 1:
The asymmetric positioning of the multiplication region allows it to be larger for improved photon detection efficiency while still maintaining adequate distance from the anode unit. By optimizing the spatial relationship between the multiplication region and surrounding structures rather than using a symmetric centered design, the patent achieves larger active detection area without proportionally increasing overall pixel area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enables the miniaturization of pixels while maintaining a desired withstand voltage, improving sensitivity and photon detection efficiency by increasing the size of the avalanche multiplication region, thus overcoming the limitations of conventional systems.
Implementation Method 1
a photoelectric conversion unit that is provided in the semiconductor substrate and generates a charge with light incident from a light receiving surface of the semiconductor substrate
Implementation Method 2
a multiplication region that is provided on an opposite side of the photoelectric conversion unit from the light receiving surface and amplifies a charge from the photoelectric conversion unit
Data Source
AI summary
Provided is a light receiving element in a semiconductor substrate and surrounded by a pixel isolation wall, the light receiving element including a multiplication region that amplifies a charge, a cathode unit on a surface of the multiplication region on an opposite side from a light receiving surface, a hole accumulation region covering the light receiving surface and an inner side surface of the pixel isolation wall, and an anode unit on a part of a surface of the hole accumulation region covering the inner side surface of the pixel isolation wall that is on the opposite side from the light receiving surface, wherein when the semiconductor substrate is viewed from above a surface on the opposite side from the light receiving surface, a center point of the multiplication region is farther from the anode unit than a center point of the light receiving element.