Spare Memory Region Segmentation for Nonvolatile Flash Writing
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Solution Overview
Problem
In flash memory systems, the inability to perform additional data writing without compromising the balance of electric charge between memory and reference cells leads to restrictions on data writing, necessitating a refreshing circuit that increases memory size and complicates architecture.
Innovation Solution
A nonvolatile memory device with a spare memory cell array divided into regions, each associated with a reference cell, allowing for concurrent writing and reading operations, enabling additional data writing without the need for a refreshing circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a refreshing circuit is introduced to enable additional data writing, then additional data writing capability is improved, but device complexity and memory size increase
Solution Approach 1:
The spare memory cell array is divided into multiple regions (first spare memory region and second spare memory region), each associated with its own reference cell. This segmentation allows different regions to serve different writing operations independently, enabling additional data writing without requiring a refreshing circuit.
Solution Approach 2:
The spare memory cell array is designed to serve multiple functions: it can store spare data for initial writing operations and also accommodate additional data writing operations. By associating multiple reference cells with different regions of the spare memory, the system achieves multi-functionality without adding complex refreshing circuits.
2Adaptability or versatility
If a refreshing circuit is introduced to enable additional data writing, then additional data writing capability is improved, but memory size increases
Solution Approach 1:
The spare memory cell array is segmented into multiple regions that can be independently used for different writing operations. This allows the existing spare memory capacity to be fully utilized for both initial and additional data writing, eliminating the need for extra memory space that would be required by a refreshing circuit.
Solution Approach 2:
The patent recovers the capability for additional data writing by properly utilizing the spare memory cell array that was previously designated only for spare data. By reconfiguring how reference cells are associated with memory regions, the system recovers unused capacity and enables additional writing without increasing overall memory size.
Data Source
AI summary
Structures, methods, and systems for multiple programming of spare memory region for nonvolatile memory are disclosed. In one embodiment, a nonvolatile memory system comprises a main memory cell array, a spare memory cell array, and a memory controller that divides the spare memory cell array into at least a first region and a second region. The system further comprises a selection module for selecting the main memory cell array and the first region to write data and the first reference cell to write first reference data associated with the data during an initial data writing operation and for selecting the second region to write additional data and the second reference cell to write second reference data associated with the additional data during an additional data writing operation.