Sparse Matrix Multiplication Circuit for CNN Efficiency
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Matrix multiplications involving sparse matrices in Convolutional Neural Networks (CNNs) are inefficient due to numerous multiplications by zero, consuming circuit time and power, and requiring significant storage space, necessitating a method to reduce the number of operations and storage needs.
Innovation Solution
A data processing apparatus and method that utilize receiver, determination, and aggregation circuitry to perform matrix operations on compressed matrices by determining interacting elements using correspondence data, reducing the number of operations and storage requirements by only processing non-zero elements and their locations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional matrix multiplication is performed on sparse matrices, then complete matrix operations are executed, but numerous multiplications by zero consume circuit time and power unnecessarily
Solution Approach 1:
The patent extracts and processes only the non-zero elements of sparse matrices, separating them from the zero elements. By identifying the positions and values of non-zero elements only, the system performs matrix operations exclusively on these relevant elements, eliminating wasteful multiplications by zero while maintaining computational correctness.
Solution Approach 2:
Instead of performing complete matrix multiplication on all elements including zeros, the patent applies partial action by executing operations only on the subset of non-zero elements. This partial processing approach reduces the number of operations proportionally to the sparsity of the matrices, thereby reducing power consumption and circuit time usage.
2Productivity
If traditional matrix multiplication is performed on sparse matrices, then all elements are processed, but a large number of multiplications by zero take place consuming circuit time
Solution Approach 1:
The patent extracts and processes only the non-zero elements of sparse matrices, separating them from the zero elements. By identifying the positions and values of non-zero elements only, the system performs matrix operations exclusively on these relevant elements, eliminating wasteful multiplications by zero while maintaining computational correctness.
Solution Approach 2:
Instead of performing complete matrix multiplication on all elements including zeros, the patent applies partial action by executing operations only on the subset of non-zero elements. This partial processing approach reduces the number of operations proportionally to the sparsity of the matrices, thereby reducing power consumption and circuit time usage.
3Quantity of substance
If sparse matrices are stored in traditional format, then all matrix elements are stored, but significant storage space is consumed due to large proportion of zero entries
Solution Approach 1:
The patent extracts and processes only the non-zero elements of sparse matrices, separating them from the zero elements. By identifying the positions and values of non-zero elements only, the system performs matrix operations exclusively on these relevant elements, eliminating wasteful multiplications by zero while maintaining computational correctness.
4Productivity
If traditional matrix operation methods are used, then all sub-steps are performed, but the number of sub-steps cannot be reduced despite many having little effect on overall operation
Solution Approach 1:
The patent extracts and processes only the non-zero elements of sparse matrices, separating them from the zero elements. By identifying the positions and values of non-zero elements only, the system performs matrix operations exclusively on these relevant elements, eliminating wasteful multiplications by zero while maintaining computational correctness.
Solution Approach 2:
Instead of performing complete matrix multiplication on all elements including zeros, the patent applies partial action by executing operations only on the subset of non-zero elements. This partial processing approach reduces the number of operations proportionally to the sparsity of the matrices, thereby reducing power consumption and circuit time usage.
Data Source
AI summary
There is provided a data processing apparatus to perform an operation on a first matrix and a second matrix. The data processing apparatus includes receiver circuitry to receive elements of the first matrix, elements of the second matrix, and correspondence data to indicate where the elements of the first matrix are located in the first matrix. Determination circuitry performs, using the correspondence data, a determination of whether, for a given element of the first matrix in column i of the first matrix, a given element of the second matrix occurs in row i of the second matrix. Aggregation circuitry calculates an aggregation between a given row in the first matrix and a given column in the second matrix and includes: functional circuitry to perform, in dependence on the determination, a function on the given element of the first matrix and the given element of the second matrix to produce a partial result.