Speculative Buffer with Context Tagging for Cache Side-Channel Isolation

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Solution Overview

Problem

Speculative execution in data processing systems can lead to security vulnerabilities, as the effects of speculative memory accesses may persist in the cache, allowing attackers to gain information about sensitive data by measuring cache access timings.

Innovation Solution

A speculative buffer is introduced, separate from the cache, where entries are allocated for speculative memory accesses until their outcome is resolved, with tagged execution context identifiers to prevent visibility to other execution contexts, thereby isolating and managing speculative data effectively.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If speculative memory accesses are allowed to proceed without isolation, then processing speed is improved through speculative execution, but security is worsened due to cache timing side-channel vulnerabilities

Engineering Contradiction:
Improveprocessing speedVSAvoidcache timing side-channel vulnerability
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent divides the cache into separate segments: a speculative buffer for speculative memory accesses and a main cache for non-speculative accesses. This segmentation isolates speculative operations from the main cache, preventing timing side-channel attacks while preserving speculative execution performance benefits.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent extracts speculative memory access effects from the main cache by implementing a separate speculative buffer. This removal of speculative operations from the main cache structure eliminates the security vulnerability while maintaining processing throughput.

Inventive Principle:
Principle #2Taking out (Extraction)

2Object-affected harmful factors

If speculative entries are isolated with execution context identifiers, then security is improved by preventing cross-context observation, but device complexity is worsened due to additional tagging and management mechanisms

Engineering Contradiction:
Improvecross-context observation preventionVSAvoidtagging and management mechanism complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent combines the execution context identifier tagging mechanism with the existing cache entry structure. By integrating context identifiers into the speculative buffer entries rather than creating a separate management system, the solution prevents cross-context observation while minimizing additional complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The execution context identifier serves multiple functions: it tags speculative entries for isolation, enables context switching persistence, and provides security boundaries. This multi-functionality reduces the need for separate mechanisms and manages complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Measurement precision

If speculative entries are stored in the main cache, then cache hit rate is improved, but reliability is worsened due to potential misprediction effects persisting in cache

Engineering Contradiction:
Improvecache hit rateVSAvoidmisprediction effect persistence
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent segments the cache system into a speculative buffer and main cache, allowing speculative entries to be stored separately. This enables the speculative buffer to provide fast access (improving hit rate) while preventing contaminated data from affecting the reliability of the main cache.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The speculative buffer acts as an intermediary between speculative memory accesses and the main cache. It captures speculative entries, providing fast access for subsequent speculative operations while preventing misprediction effects from persisting in the main cache structure.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Object-affected harmful factors

If a separate speculative buffer is introduced, then security is improved by isolating speculative data, but device complexity is worsened due to additional buffer structure

Engineering Contradiction:
Improvespeculative data isolationVSAvoidbuffer structure complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent merges the speculative buffer functionality with the existing cache control logic and management mechanisms. By integrating rather than completely separating the speculative buffer from cache management, the solution achieves data isolation while reducing overall system complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The speculative buffer is designed to work within the existing cache hierarchy and management framework, serving multiple purposes: isolation of speculative data, maintenance of context information, and provision of fast access. This multi-functionality reduces the need for additional separate structures.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11210102B2Speculative buffer for speculative memory accesses with entries tagged with execution context identifiers
Publication Date: 2021.12.28 ARM LTD
  • US11210102B2 patent drawing
  • US11210102B2 patent drawing
  • US11210102B2 patent drawing

AI summary

An apparatus comprises processing circuitry to execute instructions from one or more of a plurality of execution contexts each associated with a respective execution context identifier; a cache; and a speculative buffer. Control circuitry controls allocation of data to the cache and the speculative buffer. A speculative entry, for which allocation is caused by a speculative memory access associated with a given execution context, is allocated to the speculative buffer instead of to the cache while the speculatively executed memory access instruction remains speculative. The speculative entry specifies, as a tagged execution context identifier, the execution context identifier associated with the given execution context. Presence of the speculative entry in the speculative buffer is prevented from being observable to execution contexts other than the execution context identified by the tagged execution context identifier.