SPI Data Block Identification for Interrupt-Free TDD Transfer

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Solution Overview

Problem

Existing serial communication methods between Master SerDes and Slave SerDes require complex hardware configurations due to the need for interrupt signals and additional circuits, which increase costs and complexity.

Innovation Solution

A communication device and method that adds identification information to data blocks in synchronization with a clock, storing and transmitting them using a storage unit, allowing for serial communication without interrupt signals by employing time division duplex (TDD) method.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If interrupt signals are transmitted between master and Master SerDes to notify communication completion, then communication status can be learned, but hardware configuration becomes complex with additional pins and circuits

Engineering Contradiction:
Improvecommunication status notificationVSAvoidhardware configuration
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the interrupt signal mechanism from the system by implementing communication completion notification entirely through data blocks transmitted via the existing SPI interface. The Master SerDes embeds communication status information within regular data transmissions, eliminating the need for separate interrupt pins and circuits while maintaining reliable status notification.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The existing SPI data transmission interface is made multi-functional by using it both for data communication and for notifying communication completion status. The same MOSI/MISO lines that transmit data also carry completion notifications, making the hardware configuration more universal and reducing the need for dedicated interrupt pins.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Device complexity

If TDD method is used for serial communication between Master SerDes and Slave SerDes, then hardware configuration is simplified, but communication in upstream and downstream directions cannot be performed simultaneously

Engineering Contradiction:
Improvehardware configurationVSAvoidcommunication efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent implements periodic action through the TDD method by alternating between upstream and downstream communication time slots. Data blocks are transmitted in a periodic sequence where the Master SerDes sends data to the Slave SerDes in one time slot, and the Slave SerDes sends data back in the next time slot, creating a rhythmic communication pattern that simplifies hardware while maintaining efficiency.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The Master SerDes performs preliminary actions by pre-transmitting data blocks with embedded completion notifications before the actual communication task is fully completed. This allows the Slave SerDes to anticipate and prepare for communication completion, reducing waiting time and improving overall communication efficiency despite the half-duplex nature of TDD.

Inventive Principle:
Principle #10Preliminary action

3Device complexity

If data blocks are transmitted and stored sequentially using storage unit, then communication can proceed without interrupt signals, but data storage and retrieval time is required

Engineering Contradiction:
Improvehardware configurationVSAvoiddata storage and retrieval time
Core Design Contradiction:
Device complexityVSLoss of time

Solution Approach 1:

The storage unit performs preliminary actions by pre-storing data blocks received from the Master SerDes before they are needed for transmission to the Slave SerDes. This buffering approach allows the system to decouple reception and transmission operations, eliminating the need for interrupt signals while minimizing the impact of storage and retrieval time on overall communication performance.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The storage unit acts as an intermediary between the Master SerDes and Slave SerDes, temporarily holding data blocks and managing their flow. This mediator role allows asynchronous operation where data can be stored and retrieved at different rates, eliminating the need for synchronous interrupt-based coordination while maintaining efficient data transfer.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12393546B2Communication with serial periphal interface information
Publication Date: 2025.08.19 SONY SEMICON SOLUTIONS CORP
  • US12393546B2 patent drawing
  • US12393546B2 patent drawing
  • US12393546B2 patent drawing

AI summary

Communication devices, systems and methods are disclosed. In one example, a communication device includes: a communication unit that adds identification information for identifying a data block to a set of data blocks having a serial signal group conforming to SPI transmitted from a master in synchronization with a clock, and transmits the data block to a communication partner device within one frame period of a predetermined communication protocol, or adds identification information for identifying each of the data blocks, and transmits the data block to the communication partner device in a plurality of frame periods; and a storage unit that sequentially stores a number of data blocks transmitted from the master, and then outputs a data block transmitted from the communication partner device in response to the number of data blocks, to transmit the data block to the master.